Remy Chevallier

According to our database, Remy Chevallier authored at least 4 papers between 2005 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

Formal Verification of Timed VHDL Programs.

Abdelrezzak Bara, Pirouz Bazargan-Sabet, Remy Chevallier, Dominique Le Dû, Emmanuelle Encrenaz, Patricia Renault

Proceedings of the 2010 Forum on specification & Design Languages, 2010

2009

Timed verification of the generic architecture of a memory circuit using parametric timed automata.

Remy Chevallier, Emmanuelle Encrenaz-Tiphène, Laurent Fribourg, Weiwen Xu

Formal Methods Syst. Des., 2009

2006

Verification of the Generic Architecture of a Memory Circuit Using Parametric Timed Automata.

Remy Chevallier, Emmanuelle Encrenaz-Tiphène, Laurent Fribourg, Weiwen Xu

Proceedings of the Formal Modeling and Analysis of Timed Systems, 2006

2005

Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning.

Ghiath Al Sammane, Dominique Borrione, Remy Chevallier

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005