Renè Jensen

According to our database1, Renè Jensen authored at least 7 papers between 2002 and 2007.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
Dual Data-Rate Cyclic D/A Converter Using Semi Floating-Gate Devices.
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

Fault Tolerant CMOS Logic Using Ternary Gates.
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

2006
Multiple Valued Counter.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Self-refreshing Multiple Valued Memory.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices.
Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

2002
A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


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