Johannes Goplen Lomsdalen

According to our database1, Johannes Goplen Lomsdalen authored at least 7 papers between 2002 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2008
High Speed Ultra Low Voltage CMOS inverter.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

2007
Fault Tolerant CMOS Logic Using Ternary Gates.
Proceedings of the 37th International Symposium on Multiple-Valued Logic, 2007

2006
Multiple Valued Counter.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Self-refreshing Multiple Valued Memory.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2003
Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002


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