Riad Stefo

According to our database, Riad Stefo authored at least 2 papers between 2001 and 2003.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2003

High resolution ADPLL frequency synthesizer for FPGA-and ASIC-based applications.

Riad Stefo, Jörg Schreiter, Jens-Uwe Schluessler, René Schüffny

Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003

2001

FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.

Riad Stefo, Jose Luis Nunez, Claudia Feregrino, Sudipta Mahapatra, Simon R. Jones

Proceedings of the Field-Programmable Logic and Applications, 2001