Simon Jones

Affiliations:
  • Loughborough University of Technology, Department of Electronic and Electrical Engineering, Leicestershire, UK


According to our database1, Simon Jones authored at least 18 papers between 1993 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2005
A high-performance processor for embedded real-time control.
IEEE Trans. Control. Syst. Technol., 2005

2002
System on programmable chip for real-time control implementations.
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

2001
FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.
Proceedings of the Field-Programmable Logic and Applications, 2001

X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor.
Proceedings of the Field-Programmable Logic and Applications, 2001

2000
Toward a digital neuromorphic pitch extraction system.
IEEE Trans. Neural Networks Learn. Syst., 2000

1999
Performance evaluation of computer architectures with main memory data compression.
J. Syst. Archit., 1999

The X-MatchLITE FPGA-Based Data Compressor.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

1997
Biologically Inspired Pitch Detection System.
Proceedings of the Progress in Connectionist-Based Information Systems: Proceedings of the 1997 International Conference on Neural Information Processing and Intelligent Information Systems, 1997

VHDL-based design of biologically inspired pitch detection system.
Proceedings of International Conference on Neural Networks (ICNN'97), 1997

1996
Design and Performance of a Main Memory Hardware Data Compressor.
Proceedings of the 22rd EUROMICRO Conference '96, 1996

1995
Backpropagation in linear arrays-a performance analysis and optimization.
IEEE Trans. Neural Networks, 1995

Memory Management in Flash-Memory Disks with Data Compression
Proceedings of the Memory Management, 1995

1994
A Performance Model for Multilayer Neural Networks in Linear Arrays.
IEEE Trans. Parallel Distributed Syst., 1994

Learning in linear systolic neural network engines: analysis and implementation.
IEEE Trans. Neural Networks, 1994

Digital BiCMOS Integrated Circuit Design: Sherif H K Embabi, A. Bellaouar and Mohamed I Elmasry Kluwer Academic, Dordrecht, The Netherlands (1992) ISBN 0 7923 9276 0, £62.50, pp 432.
Microprocess. Microsystems, 1994

1993
Neural Network Feature Detector For Real-Time Video Signal Processing.
Int. J. Neural Syst., 1993

A Model Based Approach to the Performance Analysis of Multi-Layer Networks Realised in Linear Systolic Arrays.
Proceedings of the New Trends in Neural Computation, 1993

Design and implementation of video-rate real-time systems incorporating neural networks: experiments and experience.
Proceedings of the First New Zealand International Two-Stream Conference on Artificial Neural Networks and Expert Systems, 1993


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