Richard Walker

Orcid: 0000-0001-9736-3497

Affiliations:
  • University of Edinburgh, CMOS Sensors and Systems Group, UK


According to our database1, Richard Walker authored at least 15 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
A CMOS SPAD Line Sensor With Per-Pixel Histogramming TDC for Time-Resolved Multispectral Imaging.
IEEE J. Solid State Circuits, 2019

A 500Mb/s -46.1dBm CMOS SPAD Receiver for Laser Diode Visible-Light Communications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2014
A Fully Digital 8 × 16 SiPM Array for PET Applications With Per-Pixel TDCs and Real-Time Energy Output.
IEEE J. Solid State Circuits, 2014

A 256 × 8 SPAD line sensor for time resolved fluorescence and raman sensing.
Proceedings of the ESSCIRC 2014, 2014

2013
An 8×16-pixel 92kSPAD time-resolved sensor with on-pixel 64ps 12b TDC and 100MS/s real-time energy histogramming in 0.13µm CIS technology for PET/MRI applications.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
Time-Domain Fluorescence Lifetime Imaging Techniques Suitable for Solid-State Imaging Sensor Arrays.
Sensors, 2012

A Time-Resolved, Low-Noise Single-Photon Image Sensor Fabricated in Deep-Submicron CMOS Technology.
IEEE J. Solid State Circuits, 2012

A silicon photomultiplier with >30% detection efficiency from 450-750nm and 11.6μm pitch NMOS-only pixel with 21.6% fill factor in 130nm CMOS.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

A gate Modulated avalanche bipolar transistor in 130nm CMOS technology.
Proceedings of the 2012 European Solid-State Device Research Conference, 2012

2011
A 128×96 pixel event-driven phase-domain ΔΣ-based fully digital 3D camera in 0.13μm CMOS imaging technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 160×128 single-photon image sensor with on-pixel 55ps 10b time-to-digital converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2009
FPGA Implementation of a Video-rate Fluorescence Lifetime Imaging System with a 32×32 CMOS Single-photon Avalanche Diode Array.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domain.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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