Robert P. Polster

According to our database, Robert P. Polster authored at least 10 papers between 2015 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

Wafer-scale High-Density Edge Coupling for High Throughput Testing of Silicon Photonics.

Robert Polster, Liang Yuan Dai, Oscar A. Jimenez, Qixiang Cheng, Michal Lipson, Keren Bergman

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

High Throughput Bandwidth Characterization of Silicon Photonic Modulators using Offset Frequency Combs.

Nathan C. Abrams, Robert P. Polster, Liang Yuan Dai, Keren Bergman

Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

A 10Gb/s Si-photonic transceiver with 150μW 120μs-lock-time digitally supervised analog microring wavelength stabilization for 1Tb/s/mm² Die-to-Die Optical Networks.

Yvain Thonnart, Mounir Zid, Jose-Luis Gonzalez Jimenez, Guillaume Waltener, Robert Polster, Olivier Dubray, Florent Lepin, Stéphane Bernabé, Sylvie Menezo, Gabriel Pares, Olivier Castany, Laura Boutafa, Philippe Grosse, Benoît Charbonnier, Charles Baudot

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

Optical interconnects for extreme scale computing systems.

Sébastien Rumley, Meisam Bahadori, Robert P. Polster, Simon D. Hammond, David M. Calhoun, Ke Wen, Arun Rodrigues, Keren Bergman

Parallel Comput., 2017

Energy-performance optimized design of silicon photonic interconnection networks for high-performance computing.

Meisam Bahadori, Sébastien Rumley, Robert P. Polster, Alexander Gazman, Matt Traverso, Mark Webster, Kaushik Patel, Keren Bergman

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016

Efficiency Optimization of Silicon Photonic Links in 65-nm CMOS and 28-nm FDSOI Technology Nodes.

Robert Polster, Yvain Thonnart, Guillaume Waltener, Jose-Luis Gonzalez Jimenez, Eric Cassan

IEEE Trans. Very Large Scale Integr. Syst., 2016

10 Gbps, 560 fJ/b TIA and modulator driver for optical networks-on-chip in CMOS 65nm.

Jose-Luis Gonzalez Jimenez, Robert Polster, Guillaume Waltener, Yvain Thonnart, Eric Cassan

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

End-to-End Modeling and Optimization of Power Consumption in HPC Interconnects.

Sébastien Rumley, Robert P. Polster, Simon D. Hammond, Arun F. Rodrigues, Keren Bergman

Proceedings of the 45th International Conference on Parallel Processing Workshops, 2016

2015

A novel optical integrate and dump receiver for clocking signals.

Robert Polster, Jose-Luis Gonzalez Jimenez, Eric Cassan

Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

An optical clock receiver based on an injection locked ring oscillator featuring auto-calibration.

Robert Polster, Jose-Luis Gonzalez Jimenez, Ivan Miro Panades, Eric Cassan

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015