Rodrigo Caetano Rocha

Orcid: 0000-0002-6317-3908

Affiliations:
  • University of Edinburgh, UK


According to our database1, Rodrigo Caetano Rocha authored at least 22 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Online presence:

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Bibliography

2023
HyBF: A Hybrid Branch Fusion Strategy for Code Size Reduction.
Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction, 2023

Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Lasagne: a static binary translator for weak memory model architectures.
Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022

F3M: Fast Focused Function Merging.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

Loop Rolling for Code Size Reduction.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

2021
HyFM: function merging for free.
Proceedings of the LCTES '21: 22nd ACM SIGPLAN/SIGBED International Conference on Languages, 2021

2020
Effective function merging in the SSA form.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

Vectorization-aware loop unrolling with seed forwarding.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2019
Automatic parallelization of recursive functions with rewriting rules.
Sci. Comput. Program., 2019

Real-time video denoising on multicores and GPUs with Kalman-based and Bilateral filters fusion.
J. Real Time Image Process., 2019

Function Merging by Sequence Alignment.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

2018
Look-ahead SLP: auto-vectorization in the presence of commutative operations.
Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

VW-SLP: auto-vectorization with adaptive vector width.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017
TOAST: Automatic tiling for iterative stencil computations on GPUs.
Concurr. Comput. Pract. Exp., 2017

Automatic Partitioning of Stencil Computations on Heterogeneous Systems.
Proceedings of the 2017 International Symposium on Computer Architecture and High Performance Computing Workshops, 2017

Extending OpenACC for Efficient Stencil Code Generation and Execution by Skeleton Frameworks.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

Enabling efficient stencil code generation in OpenACC.
Proceedings of the International Conference on Computational Science, 2017

2016
Watershed-ng: an extensible distributed stream processing framework.
Concurr. Comput. Pract. Exp., 2016

An Algebraic Framework for Parallelizing Recurrence in Functional Programming.
Proceedings of the Programming Languages - 20th Brazilian Symposium, 2016

Regent-Dependent Creativity: A Domain Independent Metric for the Assessment of Creative Artifacts.
Proceedings of the Seventh International Conference on Computational Creativity, 2016

2014
Watershed reengineering: Making Streams Programmable.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014


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