Tom Spink

Orcid: 0000-0002-7662-3146

According to our database1, Tom Spink authored at least 19 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Risotto: A Dynamic Binary Translator for Weak Memory Model Architectures.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2022
Lasagne: a static binary translator for weak memory model architectures.
Proceedings of the PLDI '22: 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation, San Diego, CA, USA, June 13, 2022

Leaps and bounds: Analyzing WebAssembly's performance with a focus on bounds checking.
Proceedings of the IEEE International Symposium on Workload Characterization, 2022

2020
Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Mitigating JIT compilation latency in virtual execution environments.
Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2019

Uncovering Security Vulnerabilities in the Belkin WeMo Home Automation Ecosystem.
Proceedings of the IEEE International Conference on Pervasive Computing and Communications Workshops, 2019

Full-System Simulation of Mobile CPU/GPU Platforms.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

Low-cost deterministic C++ exceptions for embedded systems.
Proceedings of the 28th International Conference on Compiler Construction, 2019

2018
A Retargetable System-level DBT Hypervisor.
ACM Trans. Comput. Syst., 2018

Navigating the Landscape for Real-Time Localization and Mapping for Robotics and Virtual and Augmented Reality.
Proc. IEEE, 2018

Anatomy of a Vulnerable Fitness Tracking System: Dissecting the Fitbit Cloud, App, and Firmware.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2018

Navigating the Landscape for Real-time Localisation and Mapping for Robotics and Virtual and Augmented Reality.
CoRR, 2018

2017
Breaking Fitness Records Without Moving: Reverse Engineering and Spoofing Fitbit.
Proceedings of the Research in Attacks, Intrusions, and Defenses, 2017

SimBench: A portable benchmarking methodology for full-system simulators.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

2016
Hardware-Accelerated Cross-Architecture Full-System Virtualization.
ACM Trans. Archit. Code Optim., 2016

Efficient asynchronous interrupt handling in a full-system instruction set simulator.
Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, 2016

2015
Efficient dual-ISA support in a retargetable, asynchronous Dynamic Binary Translator.
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015

2014
Efficient code generation in a region-based dynamic binary translator.
Proceedings of the SIGPLAN/SIGBED Conference on Languages, 2014

Automated ISA branch coverage analysis and test case generation for retargetable instruction set simulators.
Proceedings of the 2014 International Conference on Compilers, 2014


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