Pavlos Petoumenos

Orcid: 0000-0002-1497-6536

Affiliations:
  • University of Manchester, UK


According to our database1, Pavlos Petoumenos authored at least 35 papers between 2006 and 2023.

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Bibliography

2023
Sgap: towards efficient sparse tensor algebra compilation for GPU.
CCF Trans. High Perform. Comput., June, 2023

BenchDirect: A Directed Language Model for Compiler Benchmarks.
CoRR, 2023

LF-checker: Machine Learning Acceleration of Bounded Model Checking for Concurrency Verification (Competition Contribution).
CoRR, 2023

HyBF: A Hybrid Branch Fusion Strategy for Code Size Reduction.
Proceedings of the 32nd ACM SIGPLAN International Conference on Compiler Construction, 2023

2022
Object Intersection Captures on Interactive Apps to Drive a Crowd-sourced Replay-based Compiler Optimization.
ACM Trans. Archit. Code Optim., 2022

F3M: Fast Focused Function Merging.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

Loop Rolling for Code Size Reduction.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2022

BenchPress: A Deep Active Benchmark Generator.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021
Collaborative Heterogeneity-Aware OS Scheduler for Asymmetric Multicore Processors.
IEEE Trans. Parallel Distributed Syst., 2021

Developer and user-transparent compiler optimization for interactive applications.
Proceedings of the PLDI '21: 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2021

HyFM: function merging for free.
Proceedings of the LCTES '21: 22nd ACM SIGPLAN/SIGBED International Conference on Languages, 2021

2020
Effective function merging in the SSA form.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

COLAB: a collaborative multi-factor scheduler for asymmetric multicore processors.
Proceedings of the CGO '20: 18th ACM/IEEE International Symposium on Code Generation and Optimization, 2020

Vectorization-aware loop unrolling with seed forwarding.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

2019
Function Merging by Sequence Alignment.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2019

POSTER: A Collaborative Multi-Factor Scheduler for Asymmetric Multicore Processors.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018
Compiler fuzzing through deep learning.
Proceedings of the 27th ACM SIGSOFT International Symposium on Software Testing and Analysis, 2018

2017
ALEA: A Fine-Grained Energy Profiling Tool.
ACM Trans. Archit. Code Optim., 2017

Minimizing the cost of iterative compilation with active learning.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

Synthesizing benchmarks for predictive modeling.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

End-to-End Deep Learning of Optimization Heuristics.
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2015
Iterative compilation on mobile devices.
CoRR, 2015

Autotuning OpenCL Workgroup Size for Stencil Patterns.
CoRR, 2015

Power Capping: What Works, What Does Not.
Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015

2014
Fast Automatic Heuristic Construction Using Active Learning.
Proceedings of the Languages and Compilers for Parallel Computing, 2014

Measuring QoE of interactive workloads and characterising frequency governors on mobile devices.
Proceedings of the 2014 IEEE International Symposium on Workload Characterization, 2014

Active learning accelerated automatic heuristic construction for parallel program mapping.
Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2010
Where replacement algorithms fail: a thorough analysis.
Proceedings of the 7th Conference on Computing Frontiers, 2010

MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance.
Proceedings of the Architecture of Computing Systems, 2010

2009
Instruction-based reuse-distance prediction for effective cache management.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

Efficient microarchitecture policies for accurately adapting to power constraints.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

2007
Cache replacement based on reuse-distance prediction.
Proceedings of the 25th International Conference on Computer Design, 2007

Using value locality to reduce memory encryption overhead in embedded processors.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2007

2006
Preventing Denial-of-Service Attacks in Shared CMP Caches.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Modeling Cache Sharing on Chip Multiprocessor Architectures.
Proceedings of the 2006 IEEE International Symposium on Workload Characterization, 2006


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