Rudrajit Datta

According to our database, Rudrajit Datta authored at least 7 papers between 2009 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Implementing triple adjacent Error Correction in double error correction Orthogonal Latin Squares Codes.

Pedro Reviriego, Shih-Fu Liu, Juan Antonio Maestro, S. Lee, Nur A. Touba, Rudrajit Datta

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

2011

Designing a fast and adaptive error correction scheme for increasing the lifetime of phase change memories.

Rudrajit Datta, Nur A. Touba

Proceedings of the 29th IEEE VLSI Test Symposium, 2011

Efficient Function Mapping in Nanoscale Crossbar Architecture.

Joon-Sung Yang, Rudrajit Datta

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

Generating Burst-Error Correcting Codes from Orthogonal Latin Square Codes - A Graph Theoretic Approach.

Rudrajit Datta, Nur A. Touba

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

X-Stacking - A Method for Reducing Control Data for Output Compaction.

Rudrajit Datta, Nur A. Touba

Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

2010

Post-manufacturing ECC customization based on Orthogonal Latin Square codes and its application to ultra-low power caches.

Rudrajit Datta, Nur A. Touba

Proceedings of the 2011 IEEE International Test Conference, 2010

2009

Exploiting Unused Spare Columns to Improve Memory ECC.

Rudrajit Datta, Nur A. Touba

Proceedings of the 27th IEEE VLSI Test Symposium, 2009