Runjiang Dou

According to our database, Runjiang Dou authored at least 14 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips.

Siyuan Wei, Ke Ning, Lei Kang, Xuemin Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023

A 24.3 μJ/Image SNN Accelerator for DVS-Gesture With WS-LOS Dataflow and Sparse Methods.

Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi, Jian Liu, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

Hierarchical Parallel Vision Processor for High-Speed Ship Detection.

Mengmeng Xu, Zhongxing Zhang, Honglong Li, Qian Luo, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC.

Huanhui Zhang, Xu Yang, Zhe Wang, Shuangming Yu, Peng Feng, Jian Liu, Nanjian Wu, Runjiang Dou, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors.

Fuming Lei, Xu Yang, Jian Liu, Nanjian Wu, Cong Shi, Runjiang Dou, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

2022

A Provisional Labels-Reduced, Real-Time Connected Component Labeling Algorithm for Edge Hardware.

Hongtao Zhou, Runjiang Dou, Li Cheng, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

ViP: A Hierarchical Parallel Vision Processor for Hybrid Vision Chip.

Xuemin Zheng, Li Cheng, Mingxin Zhao, Qian Luo, Honglong Li, Runjiang Dou, Shuangming Yu, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network.

Li Cheng, Xuemin Zheng, Mingxin Zhao, Runjiang Dou, Shuangming Yu, Nanjian Wu, Liyuan Liu

Sensors, 2022

2021

A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices.

Shuyu Wang, Mingxin Zhao, Runjiang Dou, Shuangming Yu, Liyuan Liu, Nanjian Wu

Sensors, 2021

A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology.

Tong Fang, Min Liu, Liyuan Liu, Ziteng Cai, Runjiang Dou, Peng Feng, Nan Qi, Zhao Zhang, Jian Liu, Nanjian Wu

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

2020

A High-Speed Parallel FPGA Implementation of Harris Corner Detection.

Hongtao Zhou, Runjiang Dou, Shuangming Yu, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2018

A 25 fps 32 × 24 Digital CMOS Terahertz Image Sensor.

Tong Fang, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2016

A 91.2dB SNDR 66.2fJ/conv. dynamic amplifier based 24kHz ΔΣ modulator.

Beichen Zhang, Runjiang Dou, Liyuan Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor.

Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi, Runjiang Dou, Qi Qin, Jian Liu, Nanjian Wu

Sci. China Inf. Sci., 2015