Nanjian Wu

According to our database, Nanjian Wu authored at least 113 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips.

Siyuan Wei, Ke Ning, Lei Kang, Xuemin Zheng, Mingxin Zhao, Mengmeng Xu, Shuyu Wang, Xuanzhe Xu, Runjiang Dou, Shuangming Yu, Xu Yang, Jian Liu, Cong Shi, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023

A 24.3 μJ/Image SNN Accelerator for DVS-Gesture With WS-LOS Dataflow and Sparse Methods.

Lei Kang, Xu Yang, Chi Zhang, Shuangming Yu, Runjiang Dou, Wenchang Li, Cong Shi, Jian Liu, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O.

Sikai Chen, Mingyang You, Yunqi Yang, Ye Jin, Ziyi Lin, Yihong Li, Leliang Li, Guike Li, Yujun Xie, Zhao Zhang, Binhao Wang, Ningfeng Tang, Faju Liu, Zheyu Fang, Jian Liu, Nanjian Wu, Yong Chen, Liyuan Liu, Ninghua Zhu, Ming Li, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips.

Leyi Chen, Cong Shi, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Min Tian

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

Low-cost real-time VLSI system for high-accuracy optical flow estimation using biological motion features and random forests.

Cong Shi, Junxian He, Shrinivas J. Pundlik, Xichuan Zhou, Nanjian Wu, Gang Luo

Sci. China Inf. Sci., May, 2023

Hierarchical Parallel Vision Processor for High-Speed Ship Detection.

Mengmeng Xu, Zhongxing Zhang, Honglong Li, Qian Luo, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOS.

Zhao Zhang, Zhaoyu Zhang, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

A O.4V-VDD 2.25-to-2.75GHz ULV-SS-PLL Achieving 236.6fsrms Jitter, -253.8dB Jitter-Power FoM, and -76.1dBc Reference Spur.

Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Guike Li, Nan Qi, Jian Liu, Yong Chen, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 16.4kPixel 3.08-to-3.86THz Digital Real-Time CMOS Image Sensor with 73dB Dynamic Range.

Min Liu, Ziteng Cai, Shaohua Zhou, Man-Kay Law, Jian Liu, Jianguo Ma, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

An 800G Integrated Silicon-Photonic Transmitter based on 16-Channel Mach-Zehnder Modulator and Co-Designed 5.35pJ/bit CMOS Drivers.

Jingbo Shi, Han Liu, Tao Yang, Ming Jin, Haowen Shu, Fenghe Yang, Lei Shi, Yuansheng Tao, Jianrui Deng, Ruixuan Chen, Changhao Han, Jian Liu, Nanjian Wu, Nan Qi, Liyuan Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC.

Huanhui Zhang, Xu Yang, Zhe Wang, Shuangming Yu, Peng Feng, Jian Liu, Nanjian Wu, Runjiang Dou, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 64-Gb/s 0.33-pJ/bit PAM4 Receiver Analog Front-End with a Single-Stage Triple-Peaking CTLE Achieving 22.5-dB Boost in 40-nm CMOS Process.

Guoqing Wang, Zhao Zhang, Xinyu Shen, Zhaoyu Zhang, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors.

Fuming Lei, Xu Yang, Jian Liu, Nanjian Wu, Cong Shi, Runjiang Dou, Liyuan Liu

Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 0.0035-mm² 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE.

Zhaoyu Zhang, Zhao Zhang, Yong Chen, Guoqing Wang, Xinyu Shen, Nan Qi, Guike Li, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A 4-12.1-GHz Fractional-N Ring Sampling PLL Based on Adaptively-Biased PD-Merged DTC Achieving -37.6± 0.9-dBc Integrated Phase Noise, 261.9-fs RMS Jitter, and -240.6-dB FoM.

Xinyu Shen, Zhao Zhang, Guike Li, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

A Wideband Low-Noise Linear LiDAR Analog Front-End Achieving 1.6 GHz Bandwidth, $\boldsymbol{2.7}\ \mathbf{pA}/\mathbf{Hz}^{\boldsymbol{0.5}}$ Input Referred Noise, and 103 $\mathbf{dB}\mathbf{\Omega}$ Transimpedance Gain.

Yidan Zhang, Zhao Zhang, Yiqing Xu, Xinyu Shen, Nan Qi, Nanjian Wu, Jian Liu, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

MorphBungee: A 65nm 7.2mm² 27μJ/image Digital Edge Neuromorphic Chip with On-Chip 802 Frame/s Multi-Layer Spiking Neural Network Learning.

Tengxiao Wang, Min Tian, Zhengqing Zhong, Haibing Wang, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Nanjian Wu, Liyuan Liu, Cong Shi

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A $\boldsymbol{4} \times \boldsymbol{112}-\mathbf{Gb}/\mathbf{s}$ PAM-4 Silicon-Photonic Transceiver Front-End for Linear-Drive Co-Packaged Optics.

Han Liu, Nan Qi, Donglai Lu, Zizheng Dong, Zhihan Zhang, Jian He, Guike Li, Leliang Li, Ye Liu, Ziyue Dang, Daigao Chen, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

A 12.75-to-16-GHz Spur-Jitter-Joint-Optimization SS-PLL Achieving -94.55-dBc Reference Spur, 31.9-fs Integrated Jitter and -260.1-dB FoM.

Yixi Li, Zhao Zhang, Yong Chen, Xinyu Shen, Zhao Zhang, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

Live Demonstration: Face Recognition at The Edge Using Fast On-Chip Deep Learning Neuromorphic Chip.

Zhengqing Zhong, Tengxiao Wang, Haibing Wang, Zhihua Zhou, Junxian He, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022

Exploring Structural Sparsity in CNN via Selective Penalty.

Mingxin Zhao, Junbo Peng, Shuangming Yu, Liyuan Liu, Nanjian Wu

IEEE Trans. Circuits Syst. Video Technol., 2022

A Provisional Labels-Reduced, Real-Time Connected Component Labeling Algorithm for Edge Hardware.

Hongtao Zhou, Runjiang Dou, Li Cheng, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

ViP: A Hierarchical Parallel Vision Processor for Hybrid Vision Chip.

Xuemin Zheng, Li Cheng, Mingxin Zhao, Qian Luo, Honglong Li, Runjiang Dou, Shuangming Yu, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A High-Speed NMS Coprocessor for Lightweight Ship Detection Algorithm.

Ke Ning, Mingxin Zhao, Chunhe Yao, Xuemin Zheng, Mengmeng Xu, Nanjian Wu, Liyuan Liu, Shuangming Yu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Programmable and Flexible Vision Processor.

Qian Luo, Chunhe Yao, Ke Ning, Xuemin Zheng, Mingxin Zhao, Li Cheng, Shuangming Yu, Jian Liu, Nanjian Wu, Liyuan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Low-Cost FPGA Implementation of Spiking Extreme Learning Machine With On-Chip Reward-Modulated STDP Learning.

Zhen He, Cong Shi, Tengxiao Wang, Ying Wang, Min Tian, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Gang Luo

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS.

Jian He, Yuguang Zhang, Han Liu, Qiwen Liao, Zhao Zhang, Miaofeng Li, Fan Jiang, Jingbo Shi, Jian Liu, Nanjian Wu, Yong Chen, Patrick Yin Chiang, Ningmei Yu, Xi Xiao, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects.

Jian He, Donglai Lu, Haiyun Xue, Sikai Chen, Han Liu, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Liyuan Liu, Nanjian Wu, Ningmei Yu, Fengman Liu, Xi Xiao, Yong Chen, Nan Qi

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

TripleBrain: A Compact Neuromorphic Hardware Core With Fast On-Chip Self-Organizing and Reinforcement Spike-Timing Dependent Plasticity.

Haibing Wang, Zhen He, Tengxiao Wang, Junxian He, Xichuan Zhou, Ying Wang, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi

IEEE Trans. Biomed. Circuits Syst., 2022

SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network.

Li Cheng, Xuemin Zheng, Mingxin Zhao, Runjiang Dou, Shuangming Yu, Nanjian Wu, Liyuan Liu

Sensors, 2022

A 50-Gb/s PAM-4 Silicon-Photonic Transmitter Incorporating Lumped-Segment MZM, Distributed CMOS Driver, and Integrated CDR.

Qiwen Liao, Yuguang Zhang, Siyuan Ma, Lei Wang, Leliang Li, Guike Li, Zhao Zhang, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi

IEEE J. Solid State Circuits, 2022

A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O.

Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

Floorplanning and Power/Ground Network Design for A Programmable Vision Chip.

Haozhe Xu, Siyuan Wei, Nan Qi, Peng Wu, Jian Liu, Nanjian Wu, Liyuan Liu, Shuangming Yu

Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

MorphBungee: An Edge Neuromorphic Chip for High-Accuracy On-Chip Learning of Multiple-Layer Spiking Neural Networks.

Tengxiao Wang, Haibing Wang, Junxian He, Zhengqing Zhong, Fang Tang, Xichuan Zhou, Shuangming Yu, Liyuan Liu, Nanjian Wu, Min Tian, Cong Shi

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

A 0.006-mm²6-to-20-Gb/s NRZ Bang-Bang Clock and Data Recovery Circuit With Dual-Path Loop.

Zhaoyu Zhang, Xinyu Shen, Yixi Li, Guike Li, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

A 0.004-mm² O.7-V 31.654-μW BPSK Demodulator Incorporating Dual-Path Loop Self-Biased PLL.

Yixi Li, Xinyu Shen, Zhaoyu Zhang, Guike Li, Tao Yin, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu, Yong Chen, Zhao Zhang

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

A 50-Gb/s NRZ Receiver Targeting Low-Latency Multi-Chip Module Optical I/O in 45-nm SOI CMOS.

Yihong Li, Sikai Chen, Yunqi Yang, Qianli Ma, Ming Zhong, Ziyi Lin, Leliang Li, Guike Li, Zhao Zhang, Liyuan Liu, Jian Liu, Nanjian Wu, Yong Chen, Qi Peng, Nan Qi

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021

DeepTempo: A Hardware-Friendly Direct Feedback Alignment Multi-Layer Tempotron Learning Rule for Deep Spiking Neural Networks.

Cong Shi, Tengxiao Wang, Junxian He, Jianghao Zhang, Liyuan Liu, Nanjian Wu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Low-Cost High-Speed Object Tracking VLSI System Based on Unified Textural and Dynamic Compressive Features.

Wei He, Jie Zhang, Yingcheng Lin, Xichuan Zhou, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A Cost-Efficient High-Speed VLSI Architecture for Spiking Convolutional Neural Network Inference Using Time-Step Binary Spike Maps.

Ling Zhang, Jing Yang, Cong Shi, Yingcheng Lin, Wei He, Xichuan Zhou, Xu Yang, Liyuan Liu, Nanjian Wu

Sensors, 2021

A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices.

Shuyu Wang, Mingxin Zhao, Runjiang Dou, Shuangming Yu, Liyuan Liu, Nanjian Wu

Sensors, 2021

CompSNN: A lightweight spiking neural network based on spatiotemporally compressive spike features.

Tengxiao Wang, Cong Shi, Xichuan Zhou, Yingcheng Lin, Junxian He, Ping Gan, Ping Li, Ying Wang, Liyuan Liu, Nanjian Wu, Gang Luo

Neurocomputing, 2021

TripleBrain: An Edge Neuromorphic Architecture for High-accuracy Single-layer Spiking Neural Network with On-chip Self-organizing and Reinforcement Learning.

Haibing Wang, Zhen He, Jinsong Rao, Tengxiao Wang, Junxian He, Min Tian, Xichuan Zhou, Liyuan Liu, Nanjian Wu, Cong Shi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A Fast-Transient Capacitor-Less Low-Dropout Regulator for Wideband Optical Transceivers.

Han Liu, Guike Li, Jian Liu, Nanjian Wu, Liyuan Liu, Yingtao Li, Nan Qi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors.

Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Liyuan Liu, Nanjian Wu, Cong Shi

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 32×32 Array Terahertz Sensor in 65-nm CMOS Technology.

Tong Fang, Min Liu, Liyuan Liu, Ziteng Cai, Runjiang Dou, Peng Feng, Nan Qi, Zhao Zhang, Jian Liu, Nanjian Wu

Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 50Gb/s High-Efficiency Si-Photonic Transmitter With Lump-Segmented MZM and Integrated PAM4 CDR.

Qiwen Liao, Miaofeng Li, Zhao Zhang, Jian Liu, Nanjian Wu, Xi Xiao, Nan Qi

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

Pixel Design of Ultra-high Speed CMOS Image Sensor.

Peng Feng, Liyuan Liu, Nanjian Wu

Proceedings of the 14th IEEE International Conference on ASIC, 2021

100Gb/s PAM-4 VCSEL Driver and TIA for Short-Reach 400G-1.6T Optical Interconnects.

Donglai Lu, Jian He, Weizhong Li, Sikai Chen, Jian Liu, Nanjian Wu, Ningmei Yu, Liyuan Liu, Yong Chen, Xi Xiao, Nan Qi

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2020

Quantizing Oriented Object Detection Network via Outlier-Aware Quantization and IoU Approximation.

Mingxin Zhao, Ke Ning, Shuangming Yu, Liyuan Liu, Nanjian Wu

IEEE Signal Process. Lett., 2020

A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification.

Wei He, Jinguo Huang, Tengxiao Wang, Yingcheng Lin, Junxian He, Xichuan Zhou, Ping Li, Ying Wang, Nanjian Wu, Cong Shi

Sensors, 2020

A Discrete-Time Audio ΔΣ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques.

Song Ma, Liyuan Liu, Tong Fang, Jian Liu, Nanjian Wu

IEEE J. Solid State Circuits, 2020

A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS.

Qiwen Liao, Nan Qi, Miaofeng Li, Shang Hu, Jian He, Bozhi Yin, Jingbo Shi, Jian Liu, Patrick Yin Chiang, Xi Xiao, Nanjian Wu

IEEE J. Solid State Circuits, 2020

TBC-Net: A real-time detector for infrared small target detection using semantic constraint.

Mingxin Zhao, Li Cheng, Xu Yang, Peng Feng, Liyuan Liu, Nanjian Wu

CoRR, 2020

Deterministic conversion rule for CNNs to efficient spiking convolutional neural networks.

Xu Yang, Zhongxing Zhang, Wenping Zhu, Shuangming Yu, Liyuan Liu, Nanjian Wu

Sci. China Inf. Sci., 2020

A verification method for array-based vision chip using a fixed-point neural network simulation tool.

Mingxin Zhao, Xuemin Zheng, Ke Ning, Chunhe Yao, Qian Luo, Shuangming Yu, Liyuan Liu, Nanjian Wu

Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

A 50Gb/s PAM-4 Optical Receiver with Si-Photonic PD and Linear TIA in 40nm CMOS.

Yang Liu, Nan Qi, Xiuli Xu, Weizhong Li, Lei Wang, Minjia Chen, Qixiang Cheng, Jingbo Shi, Liyuan Liu, Jian Liu, Xi Xiao, Nanjian Wu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A High-Speed Parallel FPGA Implementation of Harris Corner Detection.

Hongtao Zhou, Runjiang Dou, Shuangming Yu, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A High-speed Low-cost CNN Inference Accelerator for Depthwise Separable Convolution.

Yingcheng Lin, Rui Li, Wei He, Xichuan Zhou, Junxian He, Ping Li, Ying Jiang, Liyuan Liu, Nanjian Wu, Cong Shi

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 28GBaud High-Swing Linear Mach-Zehnder Modulators Driver for PAM-4 and Coherent Optical Communications.

Kai Hao, Jian He, Leliang Li, Shuangming Yu, Liyuan Liu, Jian Liu, Ningmei Yu, Nanjian Wu, Nan Qi

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Compact On-chip Analog Memory Cell for Storing TOF Image Signal in CMOS Process.

Zhenhua Guo, Chao Gu, Shuangming Yu, Liyuan Liu, Jian Liu, Peng Feng, Nanjian Wu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Method of Estimating FD Capacitance with Large Size Photodiode in High Speed Imaging (Invited Paper).

Chao Gu, Zhenhua Guo, Shuangming Yu, Liyuan Liu, Jian Liu, Peng Feng, Nanjian Wu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019

An 18-23 GHz 57.4-fs RMS Jitter -253.5-dB FoM Sub-Harmonically Injection-Locked All-Digital PLL With Single-Ended Injection Technique and ILFD Aided Adaptive Injection Timing Alignment Technique.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

0.1-5 GHz wideband ΔΣ fractional-N frequency synthesiser for software-defined radio application.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

IET Circuits Devices Syst., 2019

Single event upset failure probability evaluation and periodic scrubbing techniques for hierarchical parallel vision processors.

Qian Di, Zhongxing Zhang, Honglong Li, Zhao Zhang, Peng Feng, Nanjian Wu

IEICE Electron. Express, 2019

A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits.

Jincheng Yang, Zhao Zhang, Nan Qi, Liyuan Liu, Jian Liu, Nanjian Wu

Sci. China Inf. Sci., 2019

High-speed target tracking system based on multi-interconnection heterogeneous processor and multi-descriptor algorithm.

Jiaqing Wang, Yongxing Yang, Liyuan Liu, Nanjian Wu

Sci. China Inf. Sci., 2019

Efficient Reservoir Encoding Method for Near-Sensor Classification with Rate-Coding Based Spiking Convolutional Neural Networks.

Xu Yang, Shuangming Yu, Liyuan Liu, Jian Liu, Nanjian Wu

Proceedings of the Advances in Neural Networks - ISNN 2019, 2019

Design of High-Speed Drivers for 56Gb/s PAM4 Optical Communications in CMOS.

Nan Qi, Nanjian Wu

Proceedings of the 13th IEEE International Conference on ASIC, 2019

High-speed Classification of AER Data Based on a Low-cost Hardware System.

Jinguo Huang, Yingcheng Lin, Wei He, Xichuan Zhou, Cong Shi, Nanjian Wu, Gang Luo

Proceedings of the 13th IEEE International Conference on ASIC, 2019

20, 000-fps Visual Motion Magnification on Pixel-parallel Vision Chip.

Junxian He, Xichuan Zhou, Yingcheng Lin, Chonglei Sun, Cong Shi, Nanjian Wu, Gang Luo

Proceedings of the 13th IEEE International Conference on ASIC, 2019

A 8-b 1GS/s 2b/cycle SAR ADC in 28-nm CMOS.

Song Ma, Liyuan Liu, Jian Liu, Nanjian Wu

Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

A 0.9-2.25-GHz Sub-0.2-mW/GHz Compact Low-Voltage Low-Power Hybrid Digital PLL With Loop Bandwidth-Tracking Technique.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu

IEEE Trans. Very Large Scale Integr. Syst., 2018

A Heterogeneous Parallel Processor for High-Speed Vision Chip.

Jie Yang, Yongxing Yang, Zhe Chen, Liyuan Liu, Jian Liu, Nanjian Wu

IEEE Trans. Circuits Syst. Video Technol., 2018

Neuromorphic vision chips.

Nanjian Wu

Sci. China Inf. Sci., 2018

A Fast Auto-Frequency Calibration Technique for Wideband PLL with Wide Reference Frequency Range.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Nan Qi, Peng Feng, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

A 25 fps 32 × 24 Digital CMOS Terahertz Image Sensor.

Tong Fang, Runjiang Dou, Liyuan Liu, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017

A 2.4-3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique.

Zhao Zhang, Liyuan Liu, Peng Feng, Nanjian Wu

IEEE Trans. Very Large Scale Integr. Syst., 2017

High-Speed Target Tracking System Based on a Hierarchical Parallel Vision Processor and Gray-Level LBP Algorithm.

Yongxing Yang, Jie Yang, Liyuan Liu, Nanjian Wu

IEEE Trans. Syst. Man Cybern. Syst., 2017

A 1.25-to-6.25 GHz -237.2-dB FOM wideband self-biased PLL for multi-rate serial link data transmitter.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu

IEICE Electron. Express, 2017

High-speed visual target tracking with mixed rotation invariant description and skipping searching.

Yongxing Yang, Jie Yang, Zhongxing Zhang, Liyuan Liu, Nanjian Wu

Sci. China Inf. Sci., 2017

Terahertz detector for imaging in 180-nm standard CMOS process.

Zhao-yang Liu, Liyuan Liu, Zhao Zhang, Jian Liu, Nanjian Wu

Sci. China Inf. Sci., 2017

A low-power 2.4GHz ZigBee transceiver with inductor-less RF front-end for IoT applications.

Bing Xia, Nan Qi, Liyuan Liu, Nanjian Wu

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A 18-to-23 GHz -253.5dB-FoM sub-harmonically injection-locked ADPLL with ILFD aided adaptive injection timing alignment technique.

Zhao Zhang, Jincheng Yang, Liyuan Liu, Peng Feng, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

Detection of 3.0 THz wave with a detector in 65 nm standard CMOS process.

Tong Fang, Zhao-yang Liu, Liyuan Liu, Yuan-Yuan Li, Jun-qi Liu, Jian Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016

A 256×256 time-of-flight image sensor based on center-tap demodulation pixel structure.

Zhe Chen, Shan Di, Zhongxiang Cao, Qi Qin, Fei Ji, Liyuan Liu, Nanjian Wu

Sci. China Inf. Sci., 2016

A 91.2dB SNDR 66.2fJ/conv. dynamic amplifier based 24kHz ΔΣ modulator.

Beichen Zhang, Runjiang Dou, Liyuan Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

A low power global shutter pixel with extended FD voltage swing range for large format high speed CMOS image sensor.

Yangfan Zhou, Zhongxiang Cao, Ye Han, Quanliang Li, Cong Shi, Runjiang Dou, Qi Qin, Jian Liu, Nanjian Wu

Sci. China Inf. Sci., 2015

A fully-integrated 860-GHz CMOS terahertz sensor.

Zhao-yang Liu, Liyuan Liu, Jie Yang, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

High-speed object detection based on a hierarchical parallel vision chip.

Zhongxing Zhang, Jie Yang, Honglong Li, Liyuan Liu, Jian Liu, Nanjian Wu

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 1-V 5.2-5.7 GHz low noise sub-sampling phase locked loop in 0.18 μm CMOS.

Jincheng Yang, Zhao Zhang, Peng Feng, Liyuan Liu, Nanjian Wu

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

An efficient layered ABV methodology for vision system on chip based on heterogeneous parallel processors.

Victor Nshunguyimfura, Jie Yang, Liyuan Liu, Nanjian Wu

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A novel vision chip architecture for image recognition based on convolutional neural network.

Honglong Li, Zhongxing Zhang, Jie Yang, Liyuan Liu, Nanjian Wu

Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014

A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network.

Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nanjian Wu, Zhihua Wang

IEEE J. Solid State Circuits, 2014

A high speed 1000 fps CMOS image sensor with low noise global shutter pixels.

Yangfan Zhou, Zhongxiang Cao, Qi Qin, Quanliang Li, Cong Shi, Nanjian Wu

Sci. China Inf. Sci., 2014

A high speed multi-level-parallel array processor for vision chips.

Cong Shi, Jie Yang, Nanjian Wu, ZhiHua Wang

Sci. China Inf. Sci., 2014

A massively parallel keypoint detection and description (MP-KDD) algorithm for high-speed vision chip.

Cong Shi, Jie Yang, Liyuan Liu, Nanjian Wu, ZhiHua Wang

Sci. China Inf. Sci., 2014

A 2.4 GHz low power CMOS transceiver for LR-WPAN applications.

Weiyang Liu, Jingjing Chen, Xiaodong Liu, Haiyong Wang, Nanjian Wu

Sci. China Inf. Sci., 2014

7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network.

Cong Shi, Jie Yang, Ye Han, Zhongxiang Cao, Qi Qin, Liyuan Liu, Nanjian Wu, Zhihua Wang

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

A novel 2.4-to-3.6 GHz wideband subharmonically injection-locked PLL with adaptively-aligned injection timing.

Zhao Zhang, Liyuan Liu, Nanjian Wu

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013

A Low Power 2.4 GHz RF Transceiver for ZigBee Applications.

Weiyang Liu, Jingjing Chen, Haiyong Wang, Nanjian Wu

J. Circuits Syst. Comput., 2013

A 2.4 GHz energy-efficient 18-Mbps FSK transmitter in 0.18 μm CMOS.

Jingjing Chen, Weiyang Liu, Peng Feng, Haiyong Wang, Nanjian Wu

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

A novel architecture of local memory for programmable SIMD vision chip.

Zhe Chen, Jie Yang, Cong Shi, Nanjian Wu

Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012

Ultra-low-power RF transceivers for WBANs in medical applications.

Nanjian Wu, Qi Zhang

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2011

A 2.4-GHz Energy-Efficient Transmitter for Wireless Medical Applications.

Qi Zhang, Peng Feng, Zhiqing Geng, Xiaozhou Yan, Nanjian Wu

IEEE Trans. Biomed. Circuits Syst., 2011

Design of four-transistor Pixel for high speed CMOS image.

Yangfan Zhou, Zhongxiang Cao, Quanliang Li, Qi Qin, Nanjian Wu

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

A novel RFID tag chip with temperature sensor in standard CMOS process.

Qi Zhang, Peng Feng, Shenghua Zhou, Zhiqing Geng, Nanjian Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

A Smart Frequency Presetting Technique for Fast Lock-in LC-PLL Frequency Synthesizer.

Xiaozhou Yan, Xiaofei Kuang, Nanjian Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

An accurate and fast behavioral model for PLL Frequency Synthesizer phase noise/spurs prediction.

Xiaozhou Yan, Xiaofei Kuang, Nanjian Wu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

An ultra low power non-volatile memory in standard CMOS process for passive RFID tags.

Peng Feng, Yunlong Li, Nanjian Wu

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2007

A LO-leakage auto-calibrated CMOS IEEE802.11b/g WLAN transceiver.

Haiyong Wang, Guoliang Shou, Nanjian Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

A fast-settling PLL frequency synthesizer with direct frequency presetting.

Xiaofei Kuang, Nanjian Wu

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

An adaptive frequency synthesizer architecture reducing reference sidebands.

Haiyong Wang, Guoliang Shou, Nanjian Wu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006