Shuangming Yu

Orcid: 0000-0001-6678-3886

According to our database1, Shuangming Yu authored at least 23 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Real-Time 2D/3D Perception Visual Vector Processor for 1920 × 1080 High-Resolution High-Speed Intelligent Vision Chips.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023
A 24.3 μJ/Image SNN Accelerator for DVS-Gesture With WS-LOS Dataflow and Sparse Methods.
IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

A 128×128 15µm-Pitch DROIC with Pixel-Level 14-Bit ADC.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

A 0.0035-mm<sup>2</sup> 0.42-pJ/bit 8-32-Gb/s Reference-Less CDR Incorporating Adaptively-Biased ChargeSharing Integrator, Alexander PFD, and 1-Tap DFE.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

MorphBungee: A 65nm 7.2mm<sup>2</sup> 27μJ/image Digital Edge Neuromorphic Chip with On-Chip 802 Frame/s Multi-Layer Spiking Neural Network Learning.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

Live Demonstration: Face Recognition at The Edge Using Fast On-Chip Deep Learning Neuromorphic Chip.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Exploring Structural Sparsity in CNN via Selective Penalty.
IEEE Trans. Circuits Syst. Video Technol., 2022

ViP: A Hierarchical Parallel Vision Processor for Hybrid Vision Chip.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A High-Speed NMS Coprocessor for Lightweight Ship Detection Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Programmable and Flexible Vision Processor.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

SiamMixer: A Lightweight and Hardware-Friendly Visual Object-Tracking Network.
Sensors, 2022

A 1000 fps Spiking Neural Network Tracking Algorithm for On-Chip Processing of Dynamic Vision Sensor Data.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

Floorplanning and Power/Ground Network Design for A Programmable Vision Chip.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

MorphBungee: An Edge Neuromorphic Chip for High-Accuracy On-Chip Learning of Multiple-Layer Spiking Neural Networks.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021
A Compact High-Quality Image Demosaicking Neural Network for Edge-Computing Devices.
Sensors, 2021

2020
Quantizing Oriented Object Detection Network via Outlier-Aware Quantization and IoU Approximation.
IEEE Signal Process. Lett., 2020

Deterministic conversion rule for CNNs to efficient spiking convolutional neural networks.
Sci. China Inf. Sci., 2020

A verification method for array-based vision chip using a fixed-point neural network simulation tool.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

A High-Speed Parallel FPGA Implementation of Harris Corner Detection.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 28GBaud High-Swing Linear Mach-Zehnder Modulators Driver for PAM-4 and Coherent Optical Communications.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Compact On-chip Analog Memory Cell for Storing TOF Image Signal in CMOS Process.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A Method of Estimating FD Capacitance with Large Size Photodiode in High Speed Imaging (Invited Paper).
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019
Efficient Reservoir Encoding Method for Near-Sensor Classification with Rate-Coding Based Spiking Convolutional Neural Networks.
Proceedings of the Advances in Neural Networks - ISNN 2019, 2019


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