Ryuji Ohmura

According to our database, Ryuji Ohmura authored at least 3 papers between 1995 and 2001.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2001

Test cost reduction by at-speed BISR for embedded DRAMs.

Yoshihiro Nagura, Michael Mullins, Anthony Sauvageau, Yoshinoro Fujiwara, Katsuya Furue, Ryuji Ohmura, Tatsunori Komoike, Takenori Okitaka, Tetsushi Tanizaki, Katsumi Dosaka, Kazutami Arimoto, Yukiyoshi Koda, Tetsuo Tada

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

1999

A 12-ps-resolution digital variable-delay macro cell on GaAs 100 K-gates gate array using a meshed air bridge structure.

Akira Ohta, Norio Higashisaka, Tetsuya Heima, Takayuki Hisaka, Hirofumi Nakano, Ryuji Ohmura, Tadashi Takagi, Noriyuki Tanino

IEEE J. Solid State Circuits, 1999

1995

A Practical Test System with a Fuzzy Logic Controller.

Takeshi Koyama, Ryuji Ohmura

IEICE Trans. Inf. Syst., 1995