S. Cyrusian

According to our database, S. Cyrusian authored at least 3 papers between 1995 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

8.6 A Highly Reconfigurable 40-97GS/s DAC and ADC with 40GHz AFE Bandwidth and Sub-35fJ/conv-step for 400Gb/s Coherent Optical Applications in 7nm FinFET.

R. L. Nguyen, A. M. Castrillon, A. Fan, A. Mellati, Benjamín T. Reyes, Cindra Abidin, E. Olsen, F. Ahmad, Geoff Hatcher, J. Chana, Laura Biolato, L. Tse, L. Wang, M. Azarmnia, M. Davoodi, N. Campos, N. Fan, P. Prabha, Q. Lu, S. Cyrusian, S. Dallaire, S. Ho, S. Jantzi, T. Dusatko, W. Elsharkasy

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

8.7 A 112Gb/s ADC-DSP-Based PAM-4 Transceiver for Long-Reach Applications with >40dB Channel Loss in 7nm FinFET.

P. Mishra, A. Tan, Belal Helal, Cheng-Ru Ho, C. Loi, Jamal Riani, J. Sun, Kaizad Mistry, Karthik Raviprakash, L. Tse, M. Davoodi, M. Takefman, N. Fan, P. Prabha, Q. Liu, Q. Wang, Rajasekhar Nagulapalli, S. Cyrusian, S. Jantzi, S. Scouten, T. Dusatko, T. Setya, V. Giridharan, V. Gurumoorthy, Victor Karam, W. Liew, Y. Liao, Y. Ou

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

1995

Time Domain Based Modeling of Lossy Coupled Transmission Lines by Approximation of Transfer Functions.

S. Cyrusian

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995