Samira Ataei

According to our database, Samira Ataei authored at least 12 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

An Open-Source EDA Flow for Asynchronous Logic.

Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali

IEEE Des. Test, 2021

2020

Shared-Staticizer for Area-Efficient Asynchronous Circuits.

Samira Ataei, Rajit Manohar

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2019

AMC: An Asynchronous Memory Compiler.

Samira Ataei, Rajit Manohar

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018

A 64 kB Approximate SRAM Architecture for Low-Power Video Applications.

Samira Ataei, James E. Stine

IEEE Embed. Syst. Lett., 2018

A Methodology for Low-Power Approximate Embedded SRAM Within Multimedia Applications.

Samira Ataei, James E. Stine

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017

A high performance multi-port SRAM for low voltage shared memory systems in 32 nm CMOS.

Samira Ataei, Matthew Gaalswyk, James E. Stine

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

WIP. Open-source standard cell characterization process flow on 45 nm (FreePDK45), 0.18 µm, 0.25 µm, 0.35 µm and 0.5 µm.

Rabin Thapa, Samira Ataei, James E. Stine

Proceedings of the 2017 IEEE International Conference on Microelectronic Systems Education, 2017

A Reconfigurable Replica Bitline to Determine Optimum SRAM Sense Amplifier Set Time.

Samira Ataei, James E. Stine

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016

A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS.

Samira Ataei, James E. Stine, Matthew R. Guthaus

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

OpenRAM: an open-source memory compiler.

Matthew R. Guthaus, James E. Stine, Samira Ataei, Brian Chen, Bin Wu, Mehedi Sarwar

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015

A differential single-port 8T SRAM bitcell for variability tolerance and low voltage operation.

Samira Ataei, James E. Stine

Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

Multi Replica Bitline Delay Technique for Variation Tolerant Timing of SRAM Sense Amplifiers.

Samira Ataei, James E. Stine

Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015