Matthew R. Guthaus

According to our database, Matthew R. Guthaus authored at least 58 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

SRAM Design with OpenRAM in SkyWater 130nm.

Jesse Cirimelli-Low, Muhammad Hadir Khan, Samuel Crow, Amogh Lonkar, Bugra Onal, Andrew D. Zonenberg, Matthew R. Guthaus

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2019

HCDN: Hybrid-Mode Clock Distribution Networks.

Riadul Islam, Matthew R. Guthaus

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Bottom-Up Approach for High Speed SRAM Word-line Buffer Insertion Optimization.

Bin Wu, Matthew R. Guthaus

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Automated Synthesis of Multi-Port Memories and Control.

Hunter Nichols, Michael Grimes, Jennifer Sowash, Jesse Cirimelli-Low, Matthew R. Guthaus

Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Fast and Area-Efficient SRAM Word-Line Optimization.

Bin Wu, James E. Stine, Matthew R. Guthaus

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018

DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis.

Riadul Islam, Hany Ahmed Fahmy, Ping-Yao Lin, Matthew R. Guthaus

IEEE Trans. Very Large Scale Integr. Syst., 2018

2017

CMCS: Current-Mode Clock Synthesis.

Riadul Islam, Matthew R. Guthaus

IEEE Trans. Very Large Scale Integr. Syst., 2017

Architectural opportunities for novel dynamic EMI shifting (DEMIS).

Daphne I. Gorman, Matthew R. Guthaus, Jose Renau

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Timing speculative SRAM.

Elnaz Ebrahimi, Matthew R. Guthaus, Jose Renau

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Energy Savings and Performance Improvement in Subthreshold Using Adaptive Body Bias.

Rajsaktish Sankaranarayanan, Matthew R. Guthaus

Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016

A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS.

Samira Ataei, James E. Stine, Matthew R. Guthaus

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

OpenRAM: an open-source memory compiler.

Matthew R. Guthaus, James E. Stine, Samira Ataei, Brian Chen, Bin Wu, Mehedi Sarwar

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2015

Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop.

Riadul Islam, Matthew R. Guthaus

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Differential current-mode clock distribution.

Riadul Islam, Hany Ahmed Fahmy, Ping-Yao Lin, Matthew R. Guthaus

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

LC resonant clock resource minimization using compensation capacitance.

Ping-Yao Lin, Hany Ahmed Fahmy, Riadul Islam, Matthew R. Guthaus

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Multi-frequency resonant clocks.

Benjamin M. LaCara, Ping-Yao Lin, Matthew R. Guthaus

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Switched capacitor quasi-adiabatic clocks.

Hany Ahmed Fahmy, Ping-Yao Lin, Riadul Islam, Matthew R. Guthaus

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014

Confronting the Variability Issues Affecting the Performance of Next-Generation SRAM Design to Optimize and Predict the Speed and Yield.

Jeren Samandari-Rad, Matthew R. Guthaus, Richard Hughey

IEEE Access, 2014

Current-mode clock distribution.

Riadul Islam, Matthew R. Guthaus

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013

Revisiting automated physical synthesis of high-performance clock networks.

Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis

ACM Trans. Design Autom. Electr. Syst., 2013

Embedded tutorials: Embedded tutorial 1: Cell-aware test-from gates to transistors.

Janusz Rajski, Miodrag Potkonjak, Adit D. Singh, Abhijit Chatterjee, Zain Navabi, Matthew R. Guthaus, Sezer Gören

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

A decap placement methodology for reducing joule heating and temperature in PSN interconnect.

Sheldon Logan, Matthew R. Guthaus

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Redundant C4 power pin placement to ensure robust power grid delivery.

Sheldon Logan, Matthew R. Guthaus

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

2012

High-performance clock mesh optimization.

Matthew R. Guthaus, Xuchu Hu, Gustavo Wilke, Guilherme Flach, Ricardo Reis

ACM Trans. Design Autom. Electr. Syst., 2012

Distributed LC Resonant Clock Grid Synthesis.

Xuchu Hu, Matthew R. Guthaus

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Harmonic resonant clocking.

Haven Blake Skinner, Xuchu Hu, Matthew R. Guthaus

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

A single-VDD ultra-low energy sub-threshold FPGA.

Rajsaktish Sankaranarayanan, Matthew R. Guthaus

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

SEU-Aware Low-Power Memories Using a Multiple Supply Voltage Array Architecture.

Seokjoong Kim, Matthew R. Guthaus

Proceedings of the VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design, 2012

Dynamic voltage scaling for SEU-tolerance in low-power memories.

Seokjoong Kim, Matthew R. Guthaus

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

Welcome from the general chair.

Matthew R. Guthaus

Proceedings of the 20th IEEE/IFIP International Conference on VLSI and System-on-Chip, 2012

VAR-TX: A variability-aware SRAM model for predicting the optimum architecture to achieve minimum access-time for yield enhancement in nano-scaled CMOS.

Jeren Samandari-Rad, Matthew R. Guthaus, Richard Hughey

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

High-Performance, Low-Power Resonant Clocking: Embedded tutorial.

Matthew R. Guthaus, Baris Taskin

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

Lithography-aware layout compaction.

Curtis Andrus, Matthew R. Guthaus

Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

Library-aware resonant clock synthesis (LARCS).

Xuchu Hu, Walter James Condley, Matthew R. Guthaus

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

SNM-aware power reduction and reliability improvement in 45nm SRAMs.

Seokjoong Kim, Matthew R. Guthaus

Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

Advanced logic design through hands-on digital music synthesis.

Walter James Condley, Andrew W. Hill, Matthew R. Guthaus

Proceedings of the 2011 IEEE International Conference on Microelectronic Systems Education, 2011

Package-chip co-design to increase flip-chip C4 reliability.

Sheldon Logan, Matthew R. Guthaus

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Distributed LC resonant clock tree synthesis.

Matthew R. Guthaus

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Low-power multiple-bit upset tolerant memory optimization.

Seokjoong Kim, Matthew R. Guthaus

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

A methodology for local resonant clock synthesis using LC-assisted local clock buffers.

Walter James Condley, Xuchu Hu, Matthew R. Guthaus

Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

Leakage-aware redundancy for reliable sub-threshold memories.

Seokjoong Kim, Matthew R. Guthaus

Proceedings of the 48th Design Automation Conference, 2011

Distributed Resonant clOCK grid Synthesis (ROCKS).

Xuchu Hu, Matthew R. Guthaus

Proceedings of the 48th Design Automation Conference, 2011

Clock tree optimization for Electromagnetic Compatibility (EMC).

Xuchu Hu, Matthew R. Guthaus

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010

Analysis of high-performance clock networks with RLC and transmission line effects.

Walter James Condley, Xuchu Hu, Matthew R. Guthaus

Proceedings of the International Workshop on System Level Interconnect Prediction Workshop, 2010

Analysis of power supply induced jitter in actively de-skewed multi-core systems.

Derek Chan, Matthew R. Guthaus

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Non-uniform clock mesh optimization with linear programming buffer insertion.

Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis

Proceedings of the 47th Design Automation Conference, 2010

2009

Teaching VLSI design in 10 weeks.

Matthew R. Guthaus

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2009

Fault-tolerant synthesis using non-uniform redundancy.

Keven L. Woo, Matthew R. Guthaus

Proceedings of the 27th International Conference on Computer Design, 2009

Measuring and modeling variabilityusing low-cost FPGAs.

Michael Brown, Cyrus Bazeghi, Matthew R. Guthaus, Jose Renau

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

Clock tree synthesis with data-path sensitivity matching.

Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2006

Clock tree analysis and synthesis considering process parameters and variability.

Matthew R. Guthaus

PhD thesis, 2006

Clock buffer and wire sizing using sequential programming.

Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown

Proceedings of the 43rd Design Automation Conference, 2006

Process-induced skew reduction in nominal zero-skew clock trees.

Matthew R. Guthaus, Dennis Sylvester, Richard B. Brown

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.

Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown

IEEE Trans. Computers, 2005

Gate sizing using incremental parameterized statistical timing analysis.

Matthew R. Guthaus, Natesan Venkateswaran, Chandu Visweswariah, Vladimir Zolotov

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Optimization objectives and models of variation for statistical gate sizing.

Matthew R. Guthaus, Natesan Venkateswaran, Vladimir Zolotov, Dennis Sylvester, Richard B. Brown

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2003

A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference.

Robert M. Senger, Eric D. Marsman, Michael S. McCorquodale, Fadi H. Gebara, Keith L. Kraver, Matthew R. Guthaus, Richard B. Brown

Proceedings of the 40th Design Automation Conference, 2003

Increasing the number of effective registers in a low-power processor using a windowed register file.

Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown

Proceedings of the International Conference on Compilers, 2003