Rajit Manohar

According to our database, Rajit Manohar authored at least 121 papers between 1995 and 2024.

Collaborative distances:

• Dijkstra number of two.
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2024

Neuro-Symbolic Computing: Advancements and Challenges in Hardware-Software Co-Design.

Xiaoxuan Yang, Zhangyang Wang, X. Sharon Hu, Chris H. Kim, Shimeng Yu, Miroslav Pajic, Rajit Manohar, Yiran Chen, Hai Helen Li

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

2023

HALO: A Hardware-Software Co-Designed Processor for Brain-Computer Interfaces.

Karthik Sriram, Ioannis Karageorgos, Xiayuan Wen, Ján Veselý, Nick Lindsay, Michael Wu, Lenny Khazan, Raghavendra Pradyumna Pothukuchi, Rajit Manohar, Abhishek Bhattacharjee

IEEE Micro, 2023

NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report.

Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David M. Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine

CoRR, 2023

FPIM: Field-Programmable Ising Machines for Solving SAT.

Thomas Jagielski, Rajit Manohar, Jaijeet Roychowdhury

CoRR, 2023

NeuroBench: Advancing Neuromorphic Computing through Collaborative, Fair and Representative Benchmarking.

Jason Yik, Soikat Hasan Ahmed, Zergham Ahmed, Brian Anderson, Andreas G. Andreou, Chiara Bartolozzi, Arindam Basu, Douwe den Blanken, Petrut Bogdan, Sander M. Bohté, Younes Bouhadjar, Sonia M. Buckley, Gert Cauwenberghs, Federico Corradi, Guido de Croon, Andreea Danielescu, Anurag Reddy Daram, Mike Davies, Yigit Demirag, Jason Eshraghian, Jeremy Forest, Steve B. Furber, Michael Furlong, Aditya Gilra, Giacomo Indiveri, Siddharth Joshi, Vedant Karia, Lyes Khacef, James C. Knight, Laura Kriener, Rajkumar Kubendran, Dhireesha Kudithipudi, Gregor Lenz, Rajit Manohar, Christian Mayr, Konstantinos P. Michmizos, Dylan R. Muir, Emre Neftci, Thomas Nowotny, Fabrizio Ottati, Ayça Özcelikkale, Noah Pacik-Nelson, Priyadarshini Panda, Pao-Sheng Sun, Melika Payvand, Christian Pehle, Mihai A. Petrovici, Christoph Posch, Alpha Renner, Yulia Sandamirskaya, Clemens JS Schaefer, André van Schaik, Johannes Schemmel, Catherine D. Schuman, Jae-sun Seo, Sumit Bam Shrestha, Manolis Sifalakis, Amos Sironi, Kenneth Michael Stewart, Terrence C. Stewart, Philipp Stratmann, Guangzhi Tang, Jonathan Timcheck, Marian Verhelst, Craig M. Vineyard, Bernhard Vogginger, Amirreza Yousefzadeh, Biyan Zhou, Fatima Tuz Zohora, Charlotte Frenkel, Vijay Janapa Reddi

CoRR, 2023

A Multi-Site Accelerator-Rich Processing Fabric for Scalable Brain-Computer Interfacing.

Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk, Oliver Ye, Muhammed Ugur, Rajit Manohar, Anurag Khandelwal, Abhishek Bhattacharjee

CoRR, 2023

SCALO: An Accelerator-Rich Distributed System for Scalable Brain-Computer Interfacing.

Karthik Sriram, Raghavendra Pradyumna Pothukuchi, Michal Gerasimiuk, Muhammed Ugur, Oliver Ye, Rajit Manohar, Anurag Khandelwal, Abhishek Bhattacharjee

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

Verification-Driven Design for Asynchronous VLSI.

Xiang Wu, Rajit Manohar

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

Opportunistic Mutual Exclusion.

Karthi Srinivasan, Yoram Moses, Rajit Manohar

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

An Efficient Data Structure for Sparse Bit-Vectors with Applications in Neuromorphic Computing.

Prafull Purohit, Johannes Leugering, Rajit Manohar

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

Timed Signalling Processes.

Rajit Manohar, Yoram Moses

Proceedings of the 28th IEEE International Symposium on Asynchronous Circuits and Systems, 2023

2022

General Approach to Asynchronous Circuits Simulation Using Synchronous FPGAs.

Ruslan Dashkin, Rajit Manohar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A Simple, Fast, and GPU-friendly Steiner-Tree Heuristic.

Alex Fallin, Aarti Kothari, Jiayuan He, Christopher Yanez, Keshav Pingali, Rajit Manohar, Martin Burtscher

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

HALO: A Flexible and Low Power Processing Fabric for Brain-Computer Interfaces.

Abhishek Bhattacharjee, Rajit Manohar

Proceedings of the 2022 IEEE Hot Chips 34 Symposium, 2022

Hardware/software Co-design for Neuromorphic Systems.

Rajit Manohar

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

SPRoute 2.0: A detailed-routability-driven deterministic parallel global router with soft capacity.

Jiayuan He, Udit Agarwal, Yihang Yang, Rajit Manohar, Keshav Pingali

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021

Balancing Specialized Versus Flexible Computation in Brain-Computer Interfaces.

Ioannis Karageorgos, Karthik Sriram, Ján Veselý, Nick Lindsay, Xiayuan Wen, Michael Wu, Marc Powell, David A. Borton, Rajit Manohar, Abhishek Bhattacharjee

IEEE Micro, 2021

An Open-Source EDA Flow for Asynchronous Logic.

Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali

IEEE Des. Test, 2021

Zerializer: towards zero-copy serialization.

Adam Wolnikowski, Stephen Ibanez, Jonathan Stone, Changhoon Kim, Rajit Manohar, Robert Soulé

Proceedings of the HotOS '21: Workshop on Hot Topics in Operating Systems, 2021

Hierarchical Token Rings for Address-Event Encoding.

Prafull Purohit, Rajit Manohar

Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

Fluid: An Asynchronous High-level Synthesis Tool for Complex Program Structures.

Rui Li, Lincoln Berkley, Yihang Yang, Rajit Manohar

Proceedings of the 27th IEEE International Symposium on Asynchronous Circuits and Systems, 2021

2020

A Systematic Approach for Arbitration Expressions.

Ned Bingham, Rajit Manohar

IEEE Trans. Circuits Syst., 2020

Exact Timing Analysis for Asynchronous Circuits With Multiple Periods.

Rajit Manohar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

HABIT: Hardware-Assisted Bluetooth-based Infection Tracking.

Nathan Manohar, Peter Manohar, Rajit Manohar

IACR Cryptol. ePrint Arch., 2020

Hardware-Software Co-Design for Brain-Computer Interfaces.

Ioannis Karageorgos, Karthik Sriram, Ján Veselý, Michael Wu, Marc Powell, David A. Borton, Rajit Manohar, Abhishek Bhattacharjee

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Dali: A Gridded Cell Placement Flow.

Yihang Yang, Jiayuan He, Rajit Manohar

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Cyclone: A Static Timing and Power Engine for Asynchronous Circuits.

Wenmian Hua, Yi-Shan Lu, Keshav Pingali, Rajit Manohar

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

Shared-Staticizer for Area-Efficient Asynchronous Circuits.

Samira Ataei, Rajit Manohar

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2019

Operation-Dependent Frequency Scaling Using Desynchronization.

Nitish Kumar Srivastava, Rajit Manohar

IEEE Trans. Very Large Scale Integr. Syst., 2019

Self-Timed Adaptive Digit-Serial Addition.

Ned Bingham, Rajit Manohar

IEEE Trans. Very Large Scale Integr. Syst., 2019

QDI Constant-Time Counters.

Ned Bingham, Rajit Manohar

IEEE Trans. Very Large Scale Integr. Syst., 2019

Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model.

Alexander Neckar, Sam Fok, Ben Varkey Benjamin, Terrence C. Stewart, Nick N. Oza, Aaron R. Voelker, Chris Eliasmith, Rajit Manohar, Kwabena Boahen

Proc. IEEE, 2019

SPRoute: A Scalable Parallel Negotiation-based Global Router.

Jiayuan He, Martin Burtscher, Rajit Manohar, Keshav Pingali

Proceedings of the International Conference on Computer-Aided Design, 2019

Asynchronous Signalling Processes.

Rajit Manohar, Yoram Moses

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

AMC: An Asynchronous Memory Compiler.

Samira Ataei, Rajit Manohar

Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018

Exact Timing Analysis for Asynchronous Systems.

Wenmian Hua, Rajit Manohar

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

A Continuous-Time Digital IIR Filter With Signal-Derived Timing and Fully Agile Power Consumption.

Yu Chen, Xiaoyang Zhang, Yong Lian, Rajit Manohar, Yannis P. Tsividis

IEEE J. Solid State Circuits, 2018

The Impact of On-chip Communication on Memory Technologies for Neuromorphic Systems.

Saber Moradi, Rajit Manohar

CoRR, 2018

2017

Energy-efficient hybrid CMOS-NEMS LIF neuron circuit in 28 nm CMOS process.

Saber Moradi, Sunil A. Bhave, Rajit Manohar

Proceedings of the 2017 IEEE Symposium Series on Computational Intelligence, 2017

On Using Time Without Clocks via Zigzag Causality.

Asa Dan, Rajit Manohar, Yoram Moses

Proceedings of the ACM Symposium on Principles of Distributed Computing, 2017

Toolbox for exploration of energy-efficient event processors for human-computer interaction.

Tayyar Rzayev, David H. Albonesi, François Guimbretière, Rajit Manohar, Jaeyeon Kihm

Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

DeepRecon: Dynamically reconfigurable architecture for accelerating deep neural networks.

Tayyar Rzayev, Saber Moradi, David H. Albonesi, Rajit Manohar

Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Accelerating Face Detection on Programmable SoC Using C-Based Synthesis.

Nitish Kumar Srivastava, Steve Dai, Rajit Manohar, Zhiru Zhang

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Design of tunable digital delay cells.

Yu Chen, Rajit Manohar, Yannis P. Tsividis

Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

The Eventual C-Element Theorem for Delay-Insensitive Asynchronous Circuits.

Rajit Manohar, Yoram Moses

Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017

2016

Gradual Synchronization.

Sandra J. Jackson, Rajit Manohar

Proceedings of the 22nd IEEE International Symposium on Asynchronous Circuits and Systems, 2016

2015

TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip.

Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Comparing Stochastic and Deterministic Computing.

Rajit Manohar

IEEE Comput. Archit. Lett., 2015

Preventing glitches and short circuits in high-level self-timed chip specifications.

Stephen Longfield Jr., Brittany Nkounkou, Rajit Manohar, Ross Tate

Proceedings of the 36th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2015

Design of a QDI asynchronous AER serializer/deserializer link in 180nm for event-based sensors for robotic applications.

Giovanni Rovere, Chiara Bartolozzi, Nabil Imam, Rajit Manohar

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Automatic obfuscated cell layout for trusted split-foundry design.

Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, Rajit Manohar

Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

AES Hardware-Software Co-design in WSN.

Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar

Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

Analyzing Isochronic Forks with Potential Causality.

Rajit Manohar, Yoram Moses

Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

Timing Driven Placement for Quasi Delay-Insensitive Circuits.

Robert Karmazin, Stephen Longfield Jr., Carlos Tadeo Ortega Otero, Rajit Manohar

Proceedings of the 21st IEEE International Symposium on Asynchronous Circuits and Systems, 2015

2014

An asymmetric dual-processor architecture for low-power information appliances.

François Guimbretière, Shenwei Liu, Han Wang, Rajit Manohar

ACM Trans. Embed. Comput. Syst., 2014

Real-Time Scalable Cortical Computing at 46 Giga-Synaptic OPS/Watt with ~100× Speedup in Time-to-Solution and ~100, 000× Reduction in Energy-to-Solution.

Andrew S. Cassidy, Rodrigo Alvarez-Icaza, Filipp Akopyan, Jun Sawada, John V. Arthur, Paul Merolla, Pallab Datta, Marc González Tallada, Brian Taba, Alexander Andreopoulos, Arnon Amir, Steven K. Esser, Jeff Kusnitz, Rathinakumar Appuswamy, Chuck Haymes, Bernard Brezzo, Roger Moussalli, Ralph Bellofatto, Christian W. Baks, Michael Mastro, Kai Schleupen, Charles E. Cox, Ken Inoue, Steven E. Millman, Nabil Imam, Emmett McQuinn, Yutaka Y. Nakamura, Ivan Vo, Chen Guok, Don Nguyen, Scott Lekuch, Sameh W. Asaad, Daniel J. Friedman, Bryan L. Jackson, Myron Flickner, William P. Risk, Rajit Manohar, Dharmendra S. Modha

Proceedings of the International Conference for High Performance Computing, 2014

ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes.

Carlos Tadeo Ortega Otero, Jonathan Tse, Robert Karmazin, Benjamin Hill, Rajit Manohar

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Removing concurrency for rapid functional verification.

Stephen Longfield Jr., Rajit Manohar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Using asymmetric cores to reduce power consumption for interactive devices with bi-stable displays.

Jaeyeon Kihm, François Guimbretière, Julia Karl, Rajit Manohar

Proceedings of the CHI Conference on Human Factors in Computing Systems, 2014

Low Power Asynchronous VLSI with NEM Relays.

Benjamin Z. Tang, Sunil A. Bhave, Rajit Manohar

Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014

2013

Neural spiking dynamics in asynchronous digital circuits.

Nabil Imam, Kyle Wecker, Jonathan Tse, Robert Karmazin, Rajit Manohar

Proceedings of the 2013 International Joint Conference on Neural Networks, 2013

A memory-efficient routing method for large-scale spiking neural networks.

Saber Moradi, Nabil Imam, Rajit Manohar, Giacomo Indiveri

Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

A split-foundry asynchronous FPGA.

Benjamin Hill, Robert Karmazin, Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

A Bit of Analysis on Self-Timed Single-Bit On-Chip Links.

Jonathan Tse, Benjamin Hill, Rajit Manohar

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

Inverting Martin Synthesis for Verification.

Stephen Longfield Jr., Rajit Manohar

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

cellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells.

Robert Karmazin, Carlos Tadeo Ortega Otero, Rajit Manohar

Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2012

Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels.

Shivam Priyadarshi, T. Robert Harris, Samson Melamed, Carlos Tadeo Ortega Otero, Nikhil Kriplani, Carlos E. Christoffersen, Rajit Manohar, Steven R. Dooley, W. Rhett Davis, Paul D. Franzon, Michael B. Steer

IET Circuits Devices Syst., 2012

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core.

John V. Arthur, Paul Merolla, Filipp Akopyan, Rodrigo Alvarez-Icaza, Andrew Cassidy, Shyamal Chandra, Steven K. Esser, Nabil Imam, William P. Risk, Daniel Ben Dayan Rubin, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

A Low Power Asynchronous GPS Baseband Processor.

Benjamin Z. Tang, Stephen Longfield Jr., Sunil A. Bhave, Rajit Manohar

Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

An Asynchronous Floating-Point Multiplier.

Basit Riaz Sheikh, Rajit Manohar

Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

A Digital Neurosynaptic Core Using Event-Driven QDI Circuits.

Nabil Imam, Filipp Akopyan, John V. Arthur, Paul Merolla, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011

Energy-Efficient Pipeline Templates for High-Performance Asynchronous Circuits.

Basit Riaz Sheikh, Rajit Manohar

ACM J. Emerg. Technol. Comput. Syst., 2011

A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm.

Paul Merolla, John V. Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra S. Modha

Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

Address-Event Communication Using Token-Ring Mutual Exclusion.

Nabil Imam, Rajit Manohar

Proceedings of the 17th IEEE International Symposium on Asynchronous Circuits and Systems, 2011

2010

An Operand-Optimized Asynchronous IEEE 754 Double-Precision Floating-Point Adder.

Basit Riaz Sheikh, Rajit Manohar

Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

Static Power Reduction Techniques for Asynchronous Circuits.

Carlos Tadeo Ortega Otero, Jonathan Tse, Rajit Manohar

Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

An Asynchronous FPGA with Two-Phase Enable-Scaled Routing.

Christopher LaFrieda, Benjamin Hill, Rajit Manohar

Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010

2009

Reducing Power Consumption with Relaxed Quasi Delay-Insensitive Circuits.

Christopher LaFrieda, Rajit Manohar

Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009

2008

Variability in 3-D integrated circuits.

Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra J. Jackson, Rajit Manohar

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007

Resource-Constrained Signal Processing, Communications, and Networking [From the Guest Editors].

Qing Zhao, Rajit Manohar, Robert J. Ulman, Venugopal V. Veeravalli

IEEE Signal Process. Mag., 2007

Analog and asynchronous variation-aware circuits.

Alyssa B. Apsel, Rajit Manohar, Alain J. Martin

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor.

Christopher LaFrieda, Engin Ipek, José F. Martínez, Rajit Manohar

Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

2006

Self-Timed Thermally-Aware Circuits.

David Fang, Filipp Akopyan, Rajit Manohar

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology.

Song Peng, Rajit Manohar

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

Reconfigurable Asynchronous Logic.

Rajit Manohar

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Self-Healing Asynchronous Arrays.

Song Peng, Rajit Manohar

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

A Level-Crossing Flash Asynchronous Analog-to-Digital Converter.

Filipp Akopyan, Rajit Manohar, Alyssa B. Apsel

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005

Mapping system-on-chip designs from 2-D to 3-D ICs.

Christianto C. Liu, Jeng-Huei Chen, Rajit Manohar, Sandip Tiwari

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Fault Tolerant Asynchronous Adder through Dynamic Self-reconfiguration.

Song Peng, Rajit Manohar

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Automated synthesis for asynchronous FPGAs.

Song Peng, David Fang, John Teifel, Rajit Manohar

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

A High-Performance Asynchronous FPGA: Test Results.

David Fang, John Teifel, Rajit Manohar

Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Efficient Failure Detection in Pipelined Asynchronous Circuits.

Song Peng, Rajit Manohar

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

BitSNAP: Dynamic Significance Compression for a Low-Energy Sensor Network Asynchronous Processor.

Virantha N. Ekanayake, Clinton Kelly IV, Rajit Manohar

Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005

2004

An Asynchronous Dataflow FPGA Architecture.

John Teifel, Rajit Manohar

IEEE Trans. Computers, 2004

Highly pipelined asynchronous FPGAs.

John Teifel, Rajit Manohar

Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

Fault Detection and Isolation Techniques for Quasi Delay-Insensitive Circuits.

Christopher LaFrieda, Rajit Manohar

Proceedings of the 2004 International Conference on Dependable Systems and Networks (DSN 2004), 28 June, 2004

Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis.

John Teifel, Rajit Manohar

Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

Non-Uniform Access Asynchronous Register Files.

David Fang, Rajit Manohar

Proceedings of the 10th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2004), 2004

An ultra low-power processor for sensor networks.

Virantha N. Ekanayake, Clinton Kelly IV, Rajit Manohar

Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003

Power optimal routing in wireless networks.

Rajit Manohar, Anna Scaglione

Proceedings of IEEE International Conference on Communications, 2003

Programmable Asynchronous Pipeline Arrays.

John Teifel, Rajit Manohar

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks.

Clinton Kelly IV, Rajit Manohar

Proceedings of the 7th IEEE International Symposium on Distributed Simulation and Real-Time Applications (DS-RT 2003), 2003

A High-Speed Clockless Serial Link Transceiver.

John Teifel, Rajit Manohar

Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

SNAP: A Sensor-Network Asynchronous Processor.

Clinton Kelly IV, Virantha N. Ekanayake, Rajit Manohar

Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

Asynchronous DRAM Design and Synthesis.

Virantha N. Ekanayake, Rajit Manohar

Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

2002

Scalable formal design methods for asynchronous VLSI.

Rajit Manohar

Proceedings of the Conference Record of POPL 2002: The 29th SIGPLAN-SIGACT Symposium on Principles of Programming Languages, 2002

Energy-Efficient Pipelines.

Rajit Manohar, Clinton Kelly IV, John Teifel, David Fang, David Biermann

Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2001

Network on a chip: modeling wireless networks with asynchronous VLSI.

Rajit Manohar, Clinton Kelly IV

IEEE Commun. Mag., 2001

An Analysis of Reshuffled Handshaking Expansions.

Rajit Manohar

Proceedings of the 7th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2001), 2001

Precise Exceptions in Asynchronous Processors.

Rajit Manohar, Mika Nyström, Alain J. Martin

Proceedings of the 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 2001

Width-Adaptive Data Word Architectures.

Rajit Manohar

Proceedings of the 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 2001

1999

The entropy of traces in parallel computation.

Rajit Manohar

IEEE Trans. Inf. Theory, 1999

Joining Specification Statements.

K. Rustan M. Leino, Rajit Manohar

Theor. Comput. Sci., 1999

Projection: A Synthesis Technique for Concurrent Systems.

Rajit Manohar, Tak-Kwan Lee, Alain J. Martin

Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '99), 1999

1998

Asynchronous Parallel Prefix Computation.

Rajit Manohar, José A. Tierno

IEEE Trans. Computers, 1998

Slack Elasticity in Concurrent Computing.

Rajit Manohar, Alain J. Martin

Proceedings of the Mathematics of Program Construction, 1998

1997

Performance and Portability of an Air Quality Model.

Donald Dabdub, Rajit Manohar

Parallel Comput., 1997

The Design of an Asynchronous MIPS R3000 Microprocessor.

Alain J. Martin, Andrew Lines, Rajit Manohar, Mika Nyström, Paul I. Pénzes, Robert Southworth, Uri Cummings

Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997

1996

The energy and entropy of VLSI computations.

José A. Tierno, Rajit Manohar, Alain J. Martin

Proceedings of the 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '96), 1996

1995

Conditional Composition.

Rajit Manohar, K. Rustan M. Leino

Formal Aspects Comput., 1995

Integrating task and data parallelism with the group communication archetype.

K. Mani Chandy, Rajit Manohar, Berna L. Massingill, Daniel I. Meiron

Proceedings of IPPS '95, 1995