Yi-Shan Lu

According to our database, Yi-Shan Lu authored at least 7 papers between 2012 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

An Open-Source EDA Flow for Asynchronous Logic.

Samira Ataei, Wenmian Hua, Yihang Yang, Rajit Manohar, Yi-Shan Lu, Jiayuan He, Sepideh Maleki, Keshav Pingali

IEEE Des. Test, 2021

2020

Cyclone: A Static Timing and Power Engine for Asynchronous Circuits.

Wenmian Hua, Yi-Shan Lu, Keshav Pingali, Rajit Manohar

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2018

Unlocking fine-grain parallelism for AIG rewriting.

Vinicius N. Possani, Yi-Shan Lu, Alan Mishchenko, Keshav Pingali, Renato P. Ribas, André Inácio Reis

Proceedings of the International Conference on Computer-Aided Design, 2018

Can Parallel Programming Revolutionize EDA Tools?

Yi-Shan Lu, Keshav Pingali

Proceedings of the Advanced Logic Synthesis, 2018

2017

Parallel triangle counting and k-truss identification using graph-centric methods.

Chad Voegele, Yi-Shan Lu, Sreepathi Pai, Keshav Pingali

Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017

2013

Automatic generation of high-speed accurate TLM models for out-of-order pipelined bus.

Chen Kang Lo, Mao Lin Li, Li-Chun Chen, Yi-Shan Lu, Ren-Song Tsay, Hsu-Yao Huang, Jen-Chieh Yeh

ACM Trans. Embed. Comput. Syst., 2013

2012

A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.

Yu-Hung Huang, Yi-Shan Lu, Hsin-I Wu, Ren-Song Tsay

Proceedings of the 49th Annual Design Automation Conference 2012, 2012