Servesh Muralidharan

Orcid: 0000-0002-3541-5658

According to our database1, Servesh Muralidharan authored at least 11 papers between 2013 and 2026.

Collaborative distances:

Timeline

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Bibliography

2026
Sustaining Exascale Performance: Lessons from HPL and HPL-MxP on Aurora.
CoRR, April, 2026

2025
Scaling MPI Applications on Aurora.
CoRR, December, 2025

Aurora: Architecting Argonne's First Exascale Supercomputer for Accelerated Scientific Discovery.
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CoRR, September, 2025

THAPI: Tracing Heterogeneous APIs.
Proceedings of the Euro-Par 2025: Parallel Processing, 2025

2024

Ponte Vecchio Across the Atlantic: Single-Node Benchmarking of Two Intel GPU Systems.
Proceedings of the SC24-W: Workshops of the International Conference for High Performance Computing, 2024

2017
Efficient Multibyte Floating Point Data Formats Using Vectorization.
IEEE Trans. Computers, 2017

2016
Improving parallelism through communication, partitioning and load balancing optimizations
PhD thesis, 2016

2013
Compiler support for lightweight context switching.
ACM Trans. Archit. Code Optim., 2013

Heterogeneous Multiconstraint Application Partitioner (HMAP).
Proceedings of the 12th IEEE International Conference on Trust, 2013

A Parallel Runtime Framework for Communication Intensive Stream Applications.
Proceedings of the 12th IEEE International Conference on Trust, 2013


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