Tom Deakin

Orcid: 0000-0002-6439-4171

Affiliations:
  • University of Bristol, Department of Computer Science, UK


According to our database1, Tom Deakin authored at least 25 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Preliminary report: Initial evaluation of StdPar implementations on AMD GPUs for HPC.
CoRR, 2024

2023
A Comparison of Mesh-Free Differentiable Programming and Data-Driven Strategies for Optimal Control under PDE Constraints.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

Principles for Automated and Reproducible Benchmarking.
Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, 2023

2022
Evaluating ISO C++ Parallel Algorithms on Heterogeneous HPC Systems.
Proceedings of the IEEE/ACM International Workshop on Performance Modeling, 2022

Benchmarking Fortran DO CONCURRENT on CPUs and GPUs Using BabelStream.
Proceedings of the IEEE/ACM International Workshop on Performance Modeling, 2022

Heterogeneous Programming for the Homogeneous Majority.
Proceedings of the IEEE/ACM International Workshop on Performance, 2022

2021
Navigating Performance, Portability, and Productivity.
Comput. Sci. Eng., 2021

Benchmarking and Extending SYCL Hierarchical Parallelism.
Proceedings of the IEEE/ACM International Workshop on Hierarchical Parallelism for Exascale Computing, 2021

Analyzing Reduction Abstraction Capabilities.
Proceedings of the International Workshop on Performance, 2021

On measuring the maturity of SYCL implementations by tracking historical performance improvements.
Proceedings of the IWOCL'21: International Workshop on OpenCL, Munich Germany, April, 2021, 2021

2020
Benchmarking the first generation of production quality Arm-based supercomputers.
Concurr. Comput. Pract. Exp., 2020

Interpreting and Visualizing Performance Portability Metrics.
Proceedings of the IEEE/ACM International Workshop on Performance, 2020

Tracking Performance Portability on the Yellow Brick Road to Exascale.
Proceedings of the IEEE/ACM International Workshop on Performance, 2020

Hostile Cache Implications for Small, Dense Linear Solves.
Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2020

Evaluating the performance of HPC-style SYCL applications.
Proceedings of the IWOCL '20: International Workshop on OpenCL, 2020

2019
A performance analysis of the first generation of HPC-optimized Arm processors.
Concurr. Comput. Pract. Exp., 2019

Performance Portability across Diverse Computer Architectures.
Proceedings of the 2019 IEEE/ACM International Workshop on Performance, 2019

2018
An improved parallelism scheme for deterministic discrete ordinates transport.
Int. J. High Perform. Comput. Appl., 2018

Evaluating attainable memory bandwidth of parallel programming models via BabelStream.
Int. J. Comput. Sci. Eng., 2018

UnSNAP: A Mini-App for Exploring the Performance of Deterministic Discrete Ordinates Transport on Unstructured Meshes.
Proceedings of the IEEE International Conference on Cluster Computing, 2018

2017
On the Mitigation of Cache Hostile Memory Access Patterns on Many-Core CPU Architectures.
Proceedings of the High Performance Computing, 2017

TeaLeaf: A Mini-Application to Enable Design-Space Explorations for Iterative Sparse Linear Solvers.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

2016
GPU-STREAM v2.0: Benchmarking the Achievable Memory Bandwidth of Many-Core Processors Across Diverse Parallel Programming Models.
Proceedings of the High Performance Computing, 2016

Many-Core Acceleration of a Discrete Ordinates Transport Mini-App at Extreme Scale.
Proceedings of the High Performance Computing - 31st International Conference, 2016

2015
Expressing Parallelism on Many-Core for Deterministic Discrete Ordinates Transport.
Proceedings of the 2015 IEEE International Conference on Cluster Computing, 2015


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