Sheng-Chi Lung

According to our database, Sheng-Chi Lung authored at least 4 papers between 2017 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

28nm 0.3V 1W2R Sub-Threshold FIFO Memory for Multi-Sensor IoT Applications.

Huan-Jan Tseng, Po-Tsang Huang, Shang-Lin Wu, Sheng-Chi Lung, Wei-Chang Wang, Wei Hwang, Ching-Te Chuang

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

2018

28nm near/sub-threshold dual-port FIFO memory for shared queues in multi-sensor applications.

Yi-Chun Wu, Po-Tsang Huang, Shang-Lin Wu, Sheng-Chi Lung, Wei-Chang Wang, Wei Hwang, Ching-Te Chuang

Proceedings of the 2018 International Symposium on VLSI Design, 2018

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process.

Yun-Sheng Chan, Po-Tsang Huang, Shang-Lin Wu, Sheng-Chi Lung, Wei-Chang Wang, Wei Hwang, Ching-Te Chuang

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017

A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist.

Shang-Lin Wu, Kuang-Yu Li, Po-Tsang Huang, Wei Hwang, Ming-Hsien Tu, Sheng-Chi Lung, Wei-Sheng Peng, Huan-Shun Huang, Kuen-Di Lee, Yung-Shin Kao, Ching-Te Chuang

IEEE Trans. Circuits Syst. I Regul. Pap., 2017