Shengchang Cai

According to our database, Shengchang Cai authored at least 13 papers between 2011 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Automated Tuning for Silicon Photonic Filters.

Kamran Entesari, Samuel Palermo, Christi Madsen, Gihoon Choo, Ramy Rady, Shengchang Cai, Binhao Wang

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022

2020

A 32-Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver With Adaptive Echo Cancellation Techniques.

Yang-Hang Fan, Ankur Kumar, Takayuki Iwai, Ashkan Roshan-Zamir, Shengchang Cai, Bo Sun, Samuel Palermo

IEEE J. Solid State Circuits, 2020

A 1.5GS/s 8b Pipelined-SAR ADC with Output Level Shifting Settling Technique in 14nm CMOS.

Yuanming Zhu, Shengchang Cai, Shiva Kiran, Yang-Hang Fan, Po-Hsuan Chang, Sebastian Hoyos, Samuel Palermo

Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019

A 52-Gb/s ADC-Based PAM-4 Receiver With Comparator-Assisted 2-bit/Stage SAR ADC and Partially Unrolled DFE in 65-nm CMOS.

Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo

IEEE J. Solid State Circuits, 2019

A 32 Gb/s Simultaneous Bidirectional Source-Synchronous Transceiver with Adaptive Echo Cancellation in 28nm CMOS.

Yang-Hang Fan, Ankur Kumar, Takayuki Iwai, Ashkan Roshan-Zamir, Shengchang Cai, Bo Sun, Samuel Palermo

Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018

A 32 Gb/s ADC-based PAM-4 receiver with 2-bit/stage SAR ADC and partially-unrolled DFE.

Shiva Kiran, Shengchang Cai, Ying Luo, Sebastian Hoyos, Samuel Palermo

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017

A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS.

Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo

IEEE J. Solid State Circuits, 2017

2016

A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization.

Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo

IEEE J. Solid State Circuits, 2016

CMOS ADC-based receivers for high-speed electrical and optical links.

Samuel Palermo, Sebastian Hoyos, Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Shiva Kiran, Keytaek Lee

IEEE Commun. Mag., 2016

2015

A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS.

Shengchang Cai, Ehsan Zhian Tabasy, Ayman Shafik, Shiva Kiran, Sebastian Hoyos, Samuel Palermo

Proceedings of the Symposium on VLSI Circuits, 2015

Adaptively-tunable RF photonic filters.

Shengchang Cai, Gihoon Choo, Ehsan Zhian Tabasy, Binhao Wang, Kamran Entesari, Samuel Palermo

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS.

Ayman Shafik, Ehsan Zhian Tabasy, Shengchang Cai, Keytaek Lee, Sebastian Hoyos, Samuel Palermo

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2011

A hardware accelerator for speech recognition applications.

Tao Chen, Jiawei Zheng, Xingsi Zhang, Shengchang Cai, Yun Chen

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011