Ayman Shafik

Orcid: 0000-0002-4603-771X

According to our database1, Ayman Shafik authored at least 17 papers between 2012 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS.
IEEE J. Solid State Circuits, 2017

A 75-MHz Continuous-Time Sigma-Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage.
IEEE J. Solid State Circuits, 2017

2016
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization.
IEEE J. Solid State Circuits, 2016

A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization.
IEEE J. Solid State Circuits, 2016

CMOS ADC-based receivers for high-speed electrical and optical links.
IEEE Commun. Mag., 2016

2015
A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2015

A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS.
Proceedings of the Symposium on VLSI Circuits, 2015

A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique.
Proceedings of the Symposium on VLSI Circuits, 2015

25Gb/s hybrid-integrated silicon photonic receiver with microring wavelength stabilization.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

22.6 A 25Gb/s 4.4V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications.
IEEE J. Solid State Circuits, 2014

Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS.
IEEE J. Solid State Circuits, 2014

2013
A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS.
IEEE J. Solid State Circuits, 2013

A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 6b 1.6GS/s ADC with redundant cycle 1-tap embedded DFE in 90nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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