Shilin Yan

Orcid: 0000-0003-2426-8805

According to our database1, Shilin Yan authored at least 14 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
OneTracker: Unifying Visual Object Tracking with Foundation Models and Efficient Tuning.
CoRR, 2024

Referred by Multi-Modality: A Unified Temporal Transformer for Video Object Segmentation.
Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023
InstructSeq: Unifying Vision Tasks with Instruction-conditioned Multi-modal Sequence Generation.
CoRR, 2023

PanoVOS: Bridging Non-panoramic and Panoramic Views with Transformer for Video Segmentation.
CoRR, 2023

Referred by Multi-Modality: A Unified Temporal Transformer for Video Object Segmentation.
CoRR, 2023

Personalize Segment Anything Model with One Shot.
CoRR, 2023

LLaMA-Adapter: Efficient Fine-tuning of Language Models with Zero-init Attention.
CoRR, 2023

2022
Three-stage Training Pipeline with Patch Random Drop for Few-shot Object Detection.
Proceedings of the Computer Vision - ACCV 2022, 2022

2020
Using Pupil Light Reflex for Fast Biometric Authentication.
Proceedings of the ACM TUR-C'20: ACM Turing Celebration Conference, 2020

2019
Multi-objective optimization of the fiber-reinforced composite injection molding process using Taguchi method, RSM, and NSGA-II.
Simul. Model. Pract. Theory, 2019

Impacts of porous material fluid bulk properties on noise attenuation performance of cylinder shell structure based on finite element model.
Concurr. Comput. Pract. Exp., 2019

A digitalized RRAM-based Spiking Neuron Network system with 3-bit weight and unsupervised online learning scheme.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

2016
A true single-phase clock dual-modulus prescaler with enhanced robustness against leakage currents.
Int. J. Circuit Theory Appl., 2016

2015
A low-power high-speed 32/33 prescaler based on novel divide-by-4/5 unit with improved true single-phase clock logic.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015


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