Shriram Kulkarni

According to our database1, Shriram Kulkarni authored at least 9 papers between 1996 and 2001.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2001
A physical design tool for built-in self-repairable RAMs.
IEEE Trans. Very Large Scale Integr. Syst., 2001

CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices.
IEEE J. Solid State Circuits, 2001

A 250-MHz, 32-bit quantum MOS correlator prototype.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices.
Proceedings of the 30th IEEE International Symposium on Multiple-Valued Logic, 2000

A prototyping technique for large-scale RTD-CMOS circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
A Physical Design Tool for Built-in Self-Repairable Static RAMs.
Proceedings of the 1999 Design, 1999

1998
Digital circuit applications of resonant tunneling devices.
Proc. IEEE, 1998

Circuit Design using Resonant Tunneling Diodes.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1996
A high-speed 32-bit parallel correlator for spread spectrum communication.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996


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