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Shuang Hao

Affiliations:
  • University of Electronic Science and Technology of China, Chengdu, China


According to our database1, Shuang Hao authored at least 6 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
An Ultra-High Performance and Scalable Optical Flow Hardware Accelerator Based on FPGA for Autonomous Driving.
[BibTeX]
[DOI]
Ye Liu
,
Shuang Hao
,
Xiuyuan Qi
,
Kun Huang
,
Minghui Yang
,
Zili Huang
,
Yiting Li
,
Liang Chang
,
Liang Zhou
,
Yu Long
,
Jun Zhou
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2025

VSLAM-BA: Algorithm and Hardware Co-Design for High Performance and Energy-Efficient Visual SLAM Backend Hardware Accelerator.
[BibTeX]
[DOI]
Ye Liu
,
Kun Huang
,
Xiuyuan Qi
,
Shuang Hao
,
Jingyuan Li
,
Zili Huang
,
Minghui Yang
,
Neng Zhao
,
Yiting Li
,
Ruixin Mao
,
Sixu Li
,
Ang Hu
,
Liang Zhou
,
Yu Long
,
Shanshan Liu
,
Jun Zhou
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

2024
A High-Performance ORB Accelerator with Algorithm and Hardware Co-design for Visual Localization.
[BibTeX]
[DOI]
Xiuyuan Qi
,
Ye Liu
,
Shuang Hao
,
Zherong Liu
,
Kun Huang
,
Minghui Yang
,
Liang Zhou
,
Jun Zhou
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

An FPGA-based Ultra-High Performance and Scalable Optical Flow Hardware Accelerator for Autonomous Driving.
[BibTeX]
[DOI]
Ye Liu
,
Shuang Hao
,
Kun Huang
,
Minghui Yang
,
Zili Huang
,
Xiuyuan Qi
,
Yiting Li
,
Liang Zhou
,
Yu Long
,
Jun Zhou
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
BOHA: A High Performance VSLAM Backend Optimization Hardware Accelerator Using Recursive Fine-Grain H-Matrix Decomposition and Early-Computing With Approximate Linear Solver.
[BibTeX]
[DOI]
Ye Liu
,
Kun Huang
,
Neng Zhao
,
Jingyuan Li
,
Shuang Hao
,
Zili Huang
,
Xiuyuan Qi
,
Xinghao Wang
,
Liang Zhou
,
Liang Chang
,
Jun Zhou
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN.
[BibTeX]
[DOI]
Ye Liu
,
Fei Wu
,
Neng Zhao
,
Qirong Zhang
,
Wenqiang Wang
,
Yutong Yang
,
Xiangting Li
,
Sixu Li
,
Zili Huang
,
Shuang Hao
,
Guangbin Ou
,
Liang Zhou
,
Liang Chang
,
Shuisheng Lin
,
Ningyi Xu
,
Jun Zhou
IEEE Trans. Circuits Syst. II Express Briefs, 2023


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