Liang Chang
Orcid: 0000-0002-6685-5576Affiliations:
- University of Electronic Science and Technology of China, Chengdu, China
- Beihang University, Fert Beijing Research Institute, BDBC, Beijing, China
According to our database1,
Liang Chang
authored at least 62 papers
between 2016 and 2024.
Collaborative distances:
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Bibliography
2024
HISPOC: A High-Performance Irregular Activation Sparsity-Aware Point Cloud Network Accelerator.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024
HDSuper: High-Quality and High Computational Utilization Edge Super-Resolution Accelerator With Hardware-Algorithm Co-Design Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024
IPOCIM: Artificial Intelligent Architecture Design Space Exploration With Scalable Ping-Pong Computing-in-Memory Macro.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024
Taiyi: A high-performance CKKS accelerator for Practical Fully Homomorphic Encryption.
CoRR, 2024
IRConStyle: Image Restoration Framework Using Contrastive Learning and Style Transfer.
CoRR, 2024
14.8 KASP: A 96.8% 10-Keyword Accuracy and 1.68μJ/Classification Keyword Spotting and Speaker Verification Processor Using Adaptive Beamforming and Progressive Wake-Up.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
33.1 A High-Accuracy and Energy-Efficient Zero-Shot-Retraining Seizure-Detection Processor with Hybrid-Feature-Driven Adaptive Processing and Learning-Based Adaptive Channel Selection.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A High Accuracy and Low Power CNN-Based Environmental Sound Classification Processor.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
BOHA: A High Performance VSLAM Backend Optimization Hardware Accelerator Using Recursive Fine-Grain H-Matrix Decomposition and Early-Computing With Approximate Linear Solver.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023
TDPRO: Time-Domain-Based Computing-in Memory Engine for Ultra-Low Power ECG Processor.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023
An Ultra-Low Power Reconfigurable Biomedical AI Processor With Adaptive Learning for Versatile Wearable Intelligent Health Monitoring.
IEEE Trans. Biomed. Circuits Syst., October, 2023
ADAS: A High Computational Utilization Dynamic Reconfigurable Hardware Accelerator for Super Resolution.
ACM Trans. Reconfigurable Technol. Syst., September, 2023
NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN.
IEEE Trans. Circuits Syst. II Express Briefs, 2023
DL-VOPU: An Energy-Efficient Domain-Specific Deep-Learning-Based Visual Object Processing Unit Supporting Multi-Scale Semantic Feature Extraction for Mobile Object Detection/Tracking Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A FPGA-Based Iterative 6DoF Pose Refinement Processing Unit for Fast and Energy-Efficient Pose Estimation in Picking Robots.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023
HDSuper: Algorithm-Hardware Co-design for Light-weight High-quality Super-Resolution Accelerator.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
A Lightweight Convolutional Neural Network for Atrial Fibrillation Detection Using Dual-Channel Binary Features from Single-Lead Short ECG.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023
2022
IEEE J. Biomed. Health Informatics, 2022
MobileSP: An FPGA-Based Real-Time Keypoint Extraction Hardware Accelerator for Mobile VSLAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
An Ultra-Energy-Efficient and High Accuracy ECG Classification Processor With SNN Inference Assisted by On-Chip ANN Learning.
IEEE Trans. Biomed. Circuits Syst., 2022
AdaSG: A Lightweight Feature Point Matching Method Using Adaptive Descriptor with GNN for VSLAM.
Sensors, 2022
SCA: Search-Based Computing Hardware Architecture with Precision Scalable and Computation Reconfigurable Scheme.
Sensors, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
TDPRO: Ultra-low Power ECG Processor with High-Precision Time-Domain Computing Engine.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
IPOCIM: Artificial Intelligent Processor with Adaptive Ping-pong Computing-in-Memory Architecture.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022
An energy-efficient seizure detection processor using event-driven multi-stage CNN classification and segmented data processing with adaptive channel selection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
An Energy-Efficient Cardiac Arrhythmia Classification Processor using Heartbeat Difference based Classification and Event-Driven Neural Network Computation with Adaptive Wake-Up.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
A Fast and Energy-Efficient SNN Processor With Adaptive Clock/Event-Driven Computation Scheme and Online Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Lightweight Pedestrian Detection Engine with Two-Stage Low-Complexity Detection Network and Adaptive Region Focusing Technique.
Sensors, 2021
A Weight Importance Analysis Technique for Area- and Power-Efficient Binary Weight Neural Network Processor Design.
Cogn. Comput., 2021
Energy-efficient computing-in-memory architecture for AI processor: device, circuit, architecture perspective.
Sci. China Inf. Sci., 2021
A Review of Convolutional Neural Networks Hardware Accelerators for AIoT Edge Computing.
Proceedings of the International Conference on UK-China Emerging Technologies, 2021
Distilling Bit-level Sparsity Parallelism for General Purpose Deep Learning Acceleration.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
4.5 BioAIP: A Reconfigurable Biomedical AI Processor with Adaptive Learning for Versatile Intelligent Health Monitoring.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the 18th International SoC Design Conference, 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Towards Intelligent-Edge Computing: Application, Architecture, Circuit, and Device Perspective.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021
Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021
RAODAT: An Energy-Efficient Reconfigurable AI-based Object Detection and Tracking Processor with Online Learning.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Proceedings of the International SoC Design Conference, 2020
PRISM: Energy-Efficient Polymorphic Operation Based on Spin-Orbit Torque Memory for Reconfigurable Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A Fast and Efficient FPGA-based Level Set Hardware Accelerator for Image Segmentation.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020
2019
PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2019
DASM: Data-Streaming-Based Computing in Nonvolatile Memory Architecture for Embedded System.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Multi-Port 1R1W Transpose Magnetic Random Access Memory by Hierarchical Bit-Line Switching.
IEEE Access, 2019
Ultra-fast and Energy-efficient Write-Computing Operation for Neuromorphic Computing.
Proceedings of the 2019 International SoC Design Conference, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Progresses and challenges of spin orbit torque driven magnetization switching and application (Invited).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
2017
IEEE Trans. Computers, 2017
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017
PRESCOTT: Preset-based cross-point architecture for spin-orbit-torque magnetic random access memory.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016