Shung-Chih Chen

According to our database1, Shung-Chih Chen authored at least 6 papers between 1994 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2010
A low-power IP design of Viterbi decoder with dynamic threshold setting.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

1997
Diagnostic fault simulation for synchronous sequential circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Serial diagnostic fault simulation for synchronous sequential circuits.
Integr., 1997

1995
Distributed Diagnostic Fault Simulation for Synchronous Sequential Circuits by Dynamic Fault Partitioning.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A Super Fast & Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A fast and memory-efficient diagnostic fault simulation for sequential circuits.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994


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