Shung-Chih Chen

According to our database, Shung-Chih Chen authored at least 6 papers between 1994 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

A low-power IP design of Viterbi decoder with dynamic threshold setting.

Yi-Ming Lin, Wan-Ching Liu, Li-Yuan Chang, Chih-Yuan Lien, Pei-Yin Chen, Shung-Chih Chen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

1997

Diagnostic fault simulation for synchronous sequential circuits.

Shung-Chih Chen, Jer-Min Jou

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Serial diagnostic fault simulation for synchronous sequential circuits.

Shung-Chih Chen, Jer-Min Jou

Integr., 1997

1995

Distributed Diagnostic Fault Simulation for Synchronous Sequential Circuits by Dynamic Fault Partitioning.

Jer-Min Jou, Shung-Chih Chen

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

A Super Fast & Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits.

Jer-Min Jou, Shung-Chih Chen, Ren-Der Chen

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A fast and memory-efficient diagnostic fault simulation for sequential circuits.

Jer-Min Jou, Shung-Chih Chen

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994