Ren-Der Chen

Orcid: 0000-0002-0493-9950

According to our database1, Ren-Der Chen authored at least 10 papers between 1994 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Bibliography

2021
A High-Performance Bidirectional Architecture for the Quasi-Comparison-Free Sorting Algorithm.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2015
A Low-Power Architecture for the Design of a One-Dimensional Median Filter.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

2013
Design of an Area-Efficient One-Dimensional Median Filter.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

2008
Hardware Implementation for a Genetic Algorithm.
IEEE Trans. Instrum. Meas., 2008

2003
An index coding algorithm for image vector quantization.
IEEE Trans. Consumer Electron., 2003

2002
Design of a dynamic pipelined architecture for fuzzy color correction.
IEEE Trans. Very Large Scale Integr. Syst., 2002

1999
An efficient method for the decomposition and resynthesis of speed-independent circuits.
Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

Hazard-Free Synthesis and Decomposition of Asynchronous Circuits.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1994
Multiport Memory Based Data Path Allocation Focusing on Interconnection Optimization.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Super Fast & Memory Efficient Diagnostic Simulation Algorithm for Combinatorial Circuits.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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