Sina Mahdavi

According to our database1, Sina Mahdavi authored at least 9 papers between 2016 and 2018.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2018
A New Semi-Digital Low Power Low Jitter and Fast PLL in 0.18μm Technology.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018

2017
A novel APS pixel level rearrangement to increase the fill factor and SNR in 0.35μm CMOS technology.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

A new fast rail-to-rail continuous-time common-mode feedback circuit.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017

2016
A new current mode min-max circuit using CMOS technology for fuzzy applications.
Proceedings of the 2016 MIXDES, 2016

Digitally-assisted offset cancellation technique for open loop residue amplifiers in high-resolution and high-speed ADCs.
Proceedings of the 2016 MIXDES, 2016

Bulk controlled offset cancellation mechanism for single-stage latched comparator.
Proceedings of the 2016 MIXDES, 2016

A 800MS/s, 150µV input-referred offset single-stage latched comparator.
Proceedings of the 2016 MIXDES, 2016

A new ultra high speed 5-2 compressor with a new structure.
Proceedings of the 2016 MIXDES, 2016

A new adaptive PLL to reduce the lock time in 0.18µm technology.
Proceedings of the 2016 MIXDES, 2016


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