Nader Sehatbakhsh

Orcid: 0000-0001-7181-2258

According to our database1, Nader Sehatbakhsh authored at least 28 papers between 2013 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Bibliography

2024
Context-Aware Hybrid Encoding for Privacy-Preserving Computation in IoT Devices.
IEEE Internet Things J., January, 2024

2023
Fingerprinting IoT Devices Using Latent Physical Side-Channels.
Proc. ACM Interact. Mob. Wearable Ubiquitous Technol., 2023

Simulating Our Way to Safer Software: A Tale of Integrating Microarchitecture Simulation and Leakage Estimation Modeling.
IEEE Comput. Archit. Lett., 2023

Enc2: Privacy-Preserving Inference for Tiny IoTs via Encoding and Encryption.
Proceedings of the 29th Annual International Conference on Mobile Computing and Networking, 2023

Demo Abstract: Leveraging Side-Channels to Turn Processors into Low Overhead Radios.
Proceedings of the 22nd International Conference on Information Processing in Sensor Networks, 2023

Everything has its Bad Side and Good Side: Turning Processors to Low Overhead Radios Using Side-Channels.
Proceedings of the 22nd International Conference on Information Processing in Sensor Networks, 2023

Resource-Aware DNN Partitioning for Privacy-Sensitive Edge-Cloud Systems.
Proceedings of the Neural Information Processing - 30th International Conference, 2023

Hybrid Obfuscation of Chiplet-Based Systems.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
A generalized approach to estimation of memoryless covert channel information leakage capacity.
Array, 2022

2021
IDEA: Intrusion Detection through Electromagnetic-Signal Analysis for Critical Embedded and Cyber-Physical Systems.
IEEE Trans. Dependable Secur. Comput., 2021

SoK: A Study of the Security on Voice Processing Systems.
CoRR, 2021

2020
Leveraging Side-channel signals for Security and Trust.
PhD thesis, 2020

Communication Model and Capacity Limits of Covert Channels Created by Software Activities.
IEEE Trans. Inf. Forensics Secur., 2020

REMOTE: Robust External Malware Detection Framework by Using Electromagnetic Signals.
IEEE Trans. Computers, 2020

Security and Privacy Considerations for Machine Learning Models Deployed in the Government and Public Sector (white paper).
CoRR, 2020

A New Side-Channel Vulnerability on Modern Computers by Exploiting Electromagnetic Emanations from the Power Management Unit.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

EMSim: A Microarchitecture-Level Simulation Tool for Modeling Electromagnetic Side-Channel Signals.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019
Malware Detection in Embedded Systems Using Neural Network Model for Electromagnetic Side-Channel Signals.
J. Hardw. Syst. Secur., 2019

EMMA: Hardware/Software Attestation Framework for Embedded Systems Using Electromagnetic Signals.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018
Syndrome: Spectral analysis for anomaly detection on medical IoT and embedded devices.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

2017
EDDIE: EM-Based Detection of Deviations in Program Execution.
Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2016
PVTA-aware approximate custom instruction extension technique: A cross-layer approach.
Microelectron. Reliab., 2016

Spectral profiling: Observer-effect-free profiling by monitoring EM emanations.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

2013
FPGA implementation of genetic algorithm for dynamic filter-bank-based multicarrier systems.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

Bottom-up design of a high performance ultra-low power DFT utilizing multiple-VDD, multiple-Vth and gate sizing.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

Design of an ultra-low power 32-bit adder operating at subthreshold voltages in 45-nm FinFET.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

Robust polysilicon gate FinFET SRAM design using dynamic back-gate bias.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

A fully integrated linear CMOS power amplifier with high output power and dynamic range for WiMAX application.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013


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