Markus Rudack

According to our database1, Markus Rudack authored at least 7 papers between 1999 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
Supply-voltage optimization to account for process variations in high-volume manufacturing testing.
Proceedings of the 2016 IEEE International Test Conference, 2016

2009
Doubling Test Cell Throughput by On-Loadboard Hardware- Implementation and Experience in a Production Environment.
Proceedings of the 14th IEEE European Test Symposium, 2009

2002
A Large-Area Integrated Multiprocessor System for Video Applications.
IEEE Des. Test Comput., 2002

2000
Using GLFSRs for Pseudo-Random Memory BIST.
Proceedings of the 8th IEEE International Workshop on Memory Technology, 2000

Self-Configuration of a Large Area Integrated Multiprocessor System for Video Applications.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

A Multifunctional Laser Linking and Cutting Structure for Standard 0.25 mum CMOS-Technology.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1999
Yield Enhancement Considerations for a Single-Chip Multiprocessor System with Embedded DRAM.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999


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