Sreenitha Kasarapu

According to our database, Sreenitha Kasarapu authored at least 4 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Processing-in-Memory Architecture with Precision-Scaling for Malware Detection.

Sreenitha Kasarapu, Sathwika Bavikadi, Sai Manoj Pudukotai Dinakarrao

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

Resource- and Workload-Aware Model Parallelism-Inspired Novel Malware Detection for IoT Devices.

Sreenitha Kasarapu, Sanket Shukla, Sai Manoj Pudukotai Dinakarrao

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

2022

CAD-FSL: Code-Aware Data Generation based Few-Shot Learning for Efficient Malware Detection.

Sreenitha Kasarapu, Sanket Shukla, Rakibul Hassan, Avesta Sasan, Houman Homayoun, Sai Manoj P. D.

Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

2021

Demography-aware COVID-19 Confinement with Game Theory.

Sreenitha Kasarapu, Rakibul Hassan, Setareh Rafatirad, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao

Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021