Sathwika Bavikadi

Orcid: 0000-0002-1430-5070

According to our database1, Sathwika Bavikadi authored at least 14 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
3DL-PIM: A Look-Up Table Oriented Programmable Processing in Memory Architecture Based on the 3-D Stacked Memory for Data-Intensive Applications.
IEEE Trans. Emerg. Top. Comput., 2024

Processing-in-Memory Architecture with Precision-Scaling for Malware Detection.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Reconfigurable Processing-in-Memory Architecture for Data Intensive Applications.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Heterogeneous Multi-Functional Look-Up-Table-based Processing-in-Memory Architecture for Deep Learning Acceleration.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

FlutPIM: : A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning Applications.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Coarse-Grained High-speed Reconfigurable Array-based Approximate Accelerator for Deep Learning Applications.
Proceedings of the 57th Annual Conference on Information Sciences and Systems, 2023

2022
Look-up-Table Based Processing-in-Memory Architecture With Programmable Precision-Scaling for Deep Learning Applications.
IEEE Trans. Parallel Distributed Syst., 2022

A Survey on Machine Learning Accelerators and Evolutionary Hardware Platforms.
IEEE Des. Test, 2022

Accelerating Adversarial Attack using Process-in-Memory Architecture.
Proceedings of the 18th International Conference on Mobility, Sensing and Networking, 2022

POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
uPIM: Performance-aware Online Learning Capable Processing-in-Memory.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
pPIM: A Programmable Processor-in-Memory Architecture With Precision-Scaling for Deep Learning.
IEEE Comput. Archit. Lett., 2020

A Review of In-Memory Computing Architectures for Machine Learning Applications.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020


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