Steffen Vaas

According to our database1, Steffen Vaas authored at least 11 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
Anwendungsspezifische Mehrkernarchitekturen für sicherheitskritische Echtzeitanwendungen.
PhD thesis, 2022

2021
Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design.
Proceedings of the 24th IEEE International Symposium on Real-Time Distributed Computing, 2021

2019
Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands.
J. Signal Process. Syst., 2019

2018
Autonomous Driving in the Curriculum of Computer Architecture.
Proceedings of the 12th European Workshop on Microelectronics Education, 2018

Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems.
Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018

Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

2017
System on chip generation for multi-sensor and sensor fusion applications.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
The R2-D2 toolchain - Automated porting of safety-critical applications to FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

An Application-Specific Instruction Set Processor for Power Quality Monitoring.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

2015
FAUPU - A design framework for the development of programmable image processing architectures.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015


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