Marc Reichenbach
Orcid: 0000-0002-9687-6247Affiliations:
- Friedrich Alexander University of Erlangen-Nuremberg, Department of Computer Science, Erlangen, Germany
According to our database1,
Marc Reichenbach
authored at least 87 papers
between 2009 and 2024.
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Bibliography
2024
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024
2023
ACM Trans. Reconfigurable Technol. Syst., September, 2023
it Inf. Technol., May, 2023
Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins.
Proceedings of the High Performance Computing, 2023
Proceedings of the IEEE Statistical Signal Processing Workshop, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023
Datapath Optimization for Embedded Signal Processing Architectures utilizing Design Space Exploration.
Proceedings of the DroneSE and RAPIDO: System Engineering for constrained embedded systems, 2023
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023
Proceedings of the IEEE International Conference on Omni-layer Intelligent Systems, 2023
A Design-Space Exploration Framework for Application-Specific Machine Learning Targeting Reconfigurable Computing.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2023
2022
Modeling and Fault Detection of Brushless Direct Current Motor by Deep Learning Sensor Data Fusion.
Sensors, 2022
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020).
Int. J. Parallel Program., 2022
Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2022
Detecting Improvised Land-mines using Deep Neural Networks on GPR Image Dataset targeting FPGAs.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022
Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best?
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Frontiers Neurorobotics, 2021
IEEE Access, 2021
IEEE Access, 2021
Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2021
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design.
Proceedings of the 24th IEEE International Symposium on Real-Time Distributed Computing, 2021
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021
Proceedings of the 14th IEEE International Conference on Cloud Computing, 2021
2020
Proceedings of the Simulation Tools and Techniques - 12th EAI International Conference, 2020
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020
2019
Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands.
J. Signal Process. Syst., 2019
Heterogeneous Computing Utilizing FPGAs - A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms.
J. Signal Process. Syst., 2019
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
2018
IEEE Trans. Circuits Syst. Video Technol., 2018
J. Real Time Image Process., 2018
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures.
J. Real Time Image Process., 2018
Int. J. Circuit Theory Appl., 2018
A new generic HLS approach for heterogeneous computing: on the feasibility of high-level synthesis in HSA-compatible systems.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018
A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018
Proceedings of the 12th European Workshop on Microelectronics Education, 2018
Proceedings of the Euro-Par 2018: Parallel Processing Workshops, 2018
Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018
Proceedings of the Architecture of Computing Systems - ARCS 2018, 2018
2017
J. Syst. Archit., 2017
Comprehensive curriculum for reconfigurable heterogeneous computer architecture education.
IET Circuits Devices Syst., 2017
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017
The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017
LibHSA: One step towards mastering the era of heterogeneous hardware accelerators using FPGAs.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017
2016
Hybrid code description for developing fast and resource efficient image processing architectures.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016
Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits.
Proceedings of the Second International Symposium on Memory Systems, 2016
Dynamic pixel binning allows spatial and angular resolution tradeoffs to improve image quality in X-ray C-arm CT.
Proceedings of the 13th IEEE International Symposium on Biomedical Imaging, 2016
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016
Proceedings of the 11th European Workshop on Microelectronics Education, 2016
Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016
2015
J. Syst. Archit., 2015
A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures.
CoRR, 2015
Proceedings of the 8th International Conference on Simulation Tools and Techniques, 2015
Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, 2015
FAUPU - A design framework for the development of programmable image processing architectures.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Estimation of Non-functional Properties for Embedded Hardware with Application to Image Processing.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Real-time correlation for locating systems utilizing heterogeneous computing architectures.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015
2014
Fast image processing for optical metrology utilizing heterogeneous computer architectures.
Comput. Electr. Eng., 2014
Fast and generic hardware architecture for stereo block matching applications on embedded systems.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
Designing and manufacturing of real embedded multi-core CPUs: A holistic teaching approach in computer architecture.
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014
2013
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
2012
Realizing real-time centroid detection of multiple objects with marching pixels algorithms on programmable customizing hardware.
Concurr. Comput. Pract. Exp., 2012
Heterogeneous computer architectures: An image processing pipeline for optical metrology.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012
Proceedings of the 15th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2012
2011
Analytical Model for the Optimization of Self-Organizing Image Processing Systems Utilizing Cellular Automata.
Proceedings of the 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2011
Optimierung einer parallelen SIMD-Architektur für FPGA und ASIC.
Proceedings of the Informatiktage 2011, 2011
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011
2010
Realizing Real-Time Centroid Detection of Multiple Objects with Marching Pixels Algorithms.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010
2009
Proceedings of the 25th ACM Symposium on Computational Geometry, 2009