Konrad Häublein

Orcid: 0000-0002-3114-8716

According to our database1, Konrad Häublein authored at least 14 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Hybride Entwurfsbeschreibung von Bildverarbeitungsoperatoren auf FPGAs für heterogene Architekturen.
PhD thesis, 2021

2019
Heterogeneous Computing Utilizing FPGAs - A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms.
J. Signal Process. Syst., 2019

2018
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures.
J. Real Time Image Process., 2018

2017
Fast heterogeneous computing architectures for smart antennas.
J. Syst. Archit., 2017

LibHSA: One step towards mastering the era of heterogeneous hardware accelerators using FPGAs.
Proceedings of the 2017 Conference on Design and Architectures for Signal and Image Processing, 2017

2016
Hybrid code description for developing fast and resource efficient image processing architectures.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Teaching heterogeneous computer architectures using smart camera systems.
Proceedings of the 11th European Workshop on Microelectronics Education, 2016

Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Synthesis and optimization of image processing accelerators using domain knowledge.
J. Syst. Archit., 2015

Automatic Optimization of Hardware Accelerators for Image Processing.
CoRR, 2015

FAUPU - A design framework for the development of programmable image processing architectures.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Real-time correlation for locating systems utilizing heterogeneous computing architectures.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014
Fast and generic hardware architecture for stereo block matching applications on embedded systems.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Fast and Generic Hardware Architectures for 3D Image Acquisition and Processing.
Proceedings of the 8th Joint Workshop of the German Research Training Groups in Computer Science, 2014


  Loading...