Stephen Jantzi

According to our database1, Stephen Jantzi authored at least 4 papers between 2000 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2025
A 5-nm 60-GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 35.2dB SNDR up to 32 GHz.
IEEE J. Solid State Circuits, April, 2025

An Eight-Lane 800-Gb/s Transceiver for PAM-4 Optical Direct-Detection Applications in 5-nm FinFET Process.
IEEE J. Solid State Circuits, April, 2025

2024
A 5nm 60GS/s 7b 64-Way Time Interleaved Partial Loop Unrolled SAR ADC Achieving 34dB SNDR up to 32GHz.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2000
A single-chip universal burst receiver for cable modem/digital cable-TV applications.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000


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