Marco Sosio

According to our database1, Marco Sosio authored at least 16 papers between 2006 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
An Integrated Low-power 802.11ba Wake-up Radio for IoT with Embedded Microprocessor.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2020
A 243-mW 1.25-56-Gb/s Continuous Range PAM-4 42.5-dB IL ADC/DAC-Based Transceiver in 7-nm FinFET.
IEEE J. Solid State Circuits, 2020

2019

2018
Impact of CMOS Scaling on Switched-Capacitor Power Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2013
An Intuitive Current-Driven Passive Mixer Model Based on Switched-Capacitor Theory.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

A 40-MHz-to-1-GHz Fully Integrated Multistandard Silicon Tuner in 80-nm CMOS.
IEEE J. Solid State Circuits, 2013

SAW-Less Analog Front-End Receivers for TDD and FDD.
IEEE J. Solid State Circuits, 2013

2012
A 2G/3G Cellular Analog Baseband Based on a Filtering ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
A 24 GHz Subharmonic Direct Conversion Receiver in 65 nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011

A complete DVB-T/ATSC tuner analog base-band implemented with a single filtering ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
A Low Phase-Noise Multi-Phase LO Generator for Wideband Demodulators Based on Reconfigurable Sub-Harmonic Mixers.
IEEE J. Solid State Circuits, 2010

2009
A reconfigurable demodulator with 3-to-5GHz agile synthesizer for 9-band WiMedia UWB in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A 24GHz Sub-Harmonic Receiver Front-End with Integrated Multi-Phase LO Generation in 65nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS.
IEEE J. Solid State Circuits, 2007

2006
A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006


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