Alessandro Bosi

According to our database1, Alessandro Bosi authored at least 4 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019

2016
A 0.076 mm2 12 b 26.5 mW 600 MS/s 4-Way Interleaved Subranging SAR-ΔΣ ADC With On-Chip Buffer in 28 nm CMOS.
IEEE J. Solid State Circuits, 2016

27.8 A 0.076mm2 12b 26.5mW 600MS/s 4×-interleaved subranging SAR-ΔΣ ADC with on-chip buffer in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2009
A VDSL2 CPE AFE in 0.15µm CMOS with integrated line driver.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009


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