Sumeet S. Kumar

Orcid: 0000-0002-0667-7552

According to our database1, Sumeet S. Kumar authored at least 19 papers between 2012 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Towards Robust Inference of Biomedical Signals in Energy-Efficient Neuromorphic Networks.
Proceedings of the IEEE 1st Global Conference on Life Sciences and Technologies, 2019


Heterogeneous Activation Function Extraction for Training and Optimization of SNN Systems.
Proceedings of the IEEE International Conference on Artificial Intelligence Circuits and Systems, 2019

2018
PRYSTINE - PRogrammable sYSTems for INtelligence in AutomobilEs.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Uncertainty in Noise-Driven Steady-State Neuromorphic Network for ECG Data Classification.
Proceedings of the 31st IEEE International Symposium on Computer-Based Medical Systems, 2018

Energy-efficient multipath ring network for heterogeneous clustered neuronal arrays.
Proceedings of the 2018 IEEE EMBS International Conference on Biomedical & Health Informatics, 2018

2017
Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Immediate Neighborhood Temperature Adaptive Routing for Dynamically Throttled 3-D Networks-on-Chip.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Neuromorphic self-organizing map design for classification of bioelectric-timescale signals.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Energy-efficient neuromorphic receptors for wide-range temporal patterns of post-synaptic responses.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017

Neuromorphic spike data classifier for reconfigurable brain-machine interface.
Proceedings of the 8th International IEEE/EMBS Conference on Neural Engineering, 2017

2015
Ctherm: An Integrated Framework for Thermal-Functional Co-simulation of Systems-on-Chip.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

Physical characterization of steady-state temperature profiles in three-dimensional integrated circuits.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Pronto: A Low Overhead Message Passing System for High Performance Many-Core Processors.
Int. J. Netw. Comput., 2014

Improving data cache performance using Persistence Selective Caching.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Cache Balancer: Access Rate and Pain Based Resource Management for Chip Multiprocessors.
Proceedings of the Second International Symposium on Computing and Networking, 2014

2013
Low Overhead Message Passing for High Performance Many-Core Processors.
Proceedings of the First International Symposium on Computing and Networking, 2013

2012
A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICs.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012


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