Sundararajan Sriram

According to our database1, Sundararajan Sriram authored at least 10 papers between 1993 and 2001.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2001
Cyclically permutable codes for rapid acquisition in DS-CDMA systems with asynchronous base stations.
IEEE J. Sel. Areas Commun., 2001

1999
Fast acquisition method for DS-CDMA systems employing asynchronous base stations.
Proceedings of the 1999 IEEE International Conference on Communications: Global Convergence Through Communications, 1999

1998
Top-Down Design Using Cycle Based Simulation: an MPEG A/V Decoder Example.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997
Determining the Order of Processor Transactions in Statically Scheduled Multiprocessors.
J. VLSI Signal Process., 1997

Optimizing synchronization in multiprocessor DSP systems.
IEEE Trans. Signal Process., 1997

Performance analysis and optimization of mixed asynchronous synchronous systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Self-Timed Resynchronization: A Post-Optimization for Static Multiprocessor Schedules.
Proceedings of IPPS '96, 1996

Latency-constrained Resynchronization for Multiprocessor DSP Implementation.
Proceedings of the 1996 International Conference on Application-Specific Systems, 1996

1995
Minimizing Synchronization Overhead in Statically Scheduled Multiprocessor Systems.
Proceedings of the International Conference on Application Specific Array Processors (ASAP'95), 1995

1993
Design and implementation of an ordered memory access architecture.
Proceedings of the IEEE International Conference on Acoustics, 1993


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