Sung-Jae Byun
Orcid: 0009-0007-8049-3114
According to our database1,
Sung-Jae Byun authored at least 6 papers
between 2000 and 2026.
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Bibliography
2026
A 1.16 e-rms Temporal Random Noise, 123-dB High Dynamic Range, 2.988-μm Pitch 3-Mpixel Three-Stacked Digital Pixel Sensor for Versatile Applications.
IEEE J. Solid State Circuits, April, 2026
A 1.09e<sup>-</sup>-Random-Noise 1.5μm-Pixel-Pitch 12MP Global-Shutter-Equivalent CMOS Image Sensor with 3μm Digital Pixels Using Quad-Phase-Staggered Zigzag Readout and Motion Compensation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2025
6.1 A 3-Stacked Hybrid-Shutter CMOS Image Sensor with Switchable 1.2µm -Pitch 50Mpixel Rolling Shutter and 2.4µm -Pitch 12.5Mpixel Global Shutter Modes for Mobile Applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025
2022
Design and analysis on low-power and low-noise single slope ADC for digital pixel sensors.
Proceedings of the Imaging Sensors and Systems 2022, online, January 15-26, 2022, 2022
2021
A 2.6 e-rms Low-Random-Noise, 116.2 mW Low-Power 2-Mp Global Shutter CMOS Image Sensor with Pixel-Level ADC and In-Pixel Memory.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2000
FLOVA: A four-issue VLIW geometry processor with SIMD instructions and lighting acceleration unit.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000