Sungchan Kim
Orcid: 0000-0002-5887-5606
According to our database1,
Sungchan Kim
authored at least 46 papers
between 2001 and 2023.
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Bibliography
2023
Globally-Robust Instance Identification and Locally-Accurate Keypoint Alignment for Multi-Person Pose Estimation.
Proceedings of the 31st ACM International Conference on Multimedia, 2023
2021
Inf. Sci., 2021
Building Reliable Explanations of Unreliable Neural Networks: Locally Smoothing Perspective of Model Interpretation.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021
2020
Int. J. Syst. Assur. Eng. Manag., 2020
BP-GAN: Interpretable Human Branchpoint Prediction Using Attentive Generative Adversarial Networks.
IEEE Access, 2020
2017
2016
SoPHy+: Programming model and software platform for hybrid resource management of many-core accelerators.
Microprocess. Microsystems, 2016
Proceedings of the International SoC Design Conference, 2016
2015
IEEE Trans. Computers, 2015
2014
Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach.
ACM Trans. Embed. Comput. Syst., 2014
System-level performance analysis of multiprocessor system-on-chips by combining analytical model and execution time variation.
Microprocess. Microsystems, 2014
SoPHy: A Software Platform for Hybrid Resource Management of Homogeneous Many-core Accelerators.
Proceedings of the 3rd International Workshop on Many-core Embedded Systems (MES'2015) held on June 13, 2014
Software platform for hybrid resource management of a many-core accelerator for multimedia applications.
Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
2013
Failure-Aware Task Scheduling of Synchronous Data Flow Graphs Under Real-Time Constraints.
J. Signal Process. Syst., 2013
Proceedings of the International Conference on Supercomputing, 2013
Efficient run-time resource management of a manycore accelerator for stream-based applications.
Proceedings of the 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2013
2012
A Parallel Simulation Technique for Multicore Embedded Systems and Its Performance Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Efficient hierarchical bus-matrix architecture exploration of processor pool-based MPSoC.
Des. Autom. Embed. Syst., 2012
A cycle-level parallel simulation technique exploiting both space and time parallelism.
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Relaxed synchronization technique for speeding-up the parallel simulation of multiprocessor systems.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Fast Communication Architecture Exploration of Processor Pool-Based MPSoC via Static Performance Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the International Workshop on Accelerating Data Management Systems Using Modern Processor and Storage Architectures, 2011
Simulation environment configuration for parallel simulation of multicore embedded systems.
Proceedings of the 48th Design Automation Conference, 2011
2010
A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification.
J. Signal Process. Syst., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010
2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
ACM Trans. Design Autom. Electr. Syst., 2007
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems.
Proceedings of the 2007 International Conference on Compilers, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Comput. Aided Des., 2006
History-Based Selective Boolean Operations for Feature-Based Multi-resolution Modeling.
Proceedings of the Computational Science and Its Applications, 2006
2005
Schedule-aware performance estimation of communication architecture for efficient design space exploration.
IEEE Trans. Very Large Scale Integr. Syst., 2005
Proceedings of the Tenth ACM Symposium on Solid and Physical Modeling 2005, 2005
2004
Fast design space exploration framework with an efficient performance estimation technique.
Proceedings of the 2nd Workshop on Embedded Systems for Real-Time Multimedia, 2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
2001
Proceedings of ASP-DAC 2001, 2001