Chaeseok Im

According to our database1, Chaeseok Im authored at least 11 papers between 2001 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Source level offloading for special-purpose hardware accelerators.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

2013
A dynamically reconfigurable operating system for manycore systems.
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013

2012
A real-time operating system for manycore systems.
Proceedings of the ACM Symposium on Applied Computing, 2012

2006
A Software Reproduction of Virtual Memory for Deeply Embedded Systems.
Proceedings of the Computational Science and Its Applications, 2006

2005
Schedule-aware performance estimation of communication architecture for efficient design space exploration.
IEEE Trans. Very Large Scale Integr. Syst., 2005

2004
Dynamic voltage scheduling with buffers in low-power multimedia applications.
ACM Trans. Embed. Comput. Syst., 2004

Energy Optimization for Latency- and Quality-Constrained Video Applications.
IEEE Des. Test Comput., 2004

Dynamic voltage scaling for real-time multi-task scheduling using buffers.
Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, 2004

Efficient exploration of on-chip bus architectures and memory allocation.
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003
An Energy Optimization Technique for Latency and Quality Constrained Video Applications.
Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003

2001
Dynamic voltage scheduling technique for low-power multimedia applications using buffers.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001


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