Hoeseok Yang

Orcid: 0000-0002-7929-7470

According to our database1, Hoeseok Yang authored at least 56 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
To Balance or to Not? Battery Aging-Aware Active Cell Balancing for Electric Vehicles.
CoRR, 2024

Wear Leveling-Aware Active Battery Cell Balancing.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
DyRA: Dynamic Resolution Adjustment for Scale-robust Object Detection.
CoRR, 2023

Machine Learning-Driven Burrowing with a Snake-Like Robot.
CoRR, 2023

A Runtime Switchable Multi-Phase Convolutional Neural Network for Resource-Constrained Systems.
IEEE Access, 2023

2021
Real-Time Schedulability Analysis and Enhancement of Transiently Powered Processors With NVMs.
IEEE Trans. Computers, 2021

Adaptive run-time scheduling of dependent services for service-oriented IoT systems.
Des. Autom. Embed. Syst., 2021

Fully Adaptive Stochastic Handling of Soft-Errors in Real-Time Systems.
IEEE Access, 2021

Scheduling of Iterative Computing Hardware Units for Accuracy and Energy Efficiency.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Optimal Partitioning of Distributed Neural Networks for Various Communication Environments.
Proceedings of the International Conference on Artificial Intelligence in Information and Communication, 2021

A GPU Architecture Aware Fine-Grain Pruning Technique for Deep Neural Networks.
Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020
Reliability Optimization of Real-Time Satellite Embedded System Under Temperature Variations.
IEEE Access, 2020

Improvement of CNN-Based Road Extraction from Satellite Images via Morphological Image Processing.
Proceedings of the IEEE International Geoscience and Remote Sensing Symposium, 2020

2019
Optimization of Fault-Tolerant Mixed-Criticality Multi-Core Systems with Enhanced WCRT Analysis.
ACM Trans. Design Autom. Electr. Syst., 2019

Measurement-Based Power Optimization Technique for OpenCV on Heterogeneous Multicore Processor.
Symmetry, 2019

Temperature Sensor Assisted Lifetime Enhancement of Satellite Embedded Systems via Multi-Core Task Mapping and DVFS.
Sensors, 2019

Efficiently Switchable Context-Aware Dataflow Adaptation Technique for Low-Power Multi-Core Embedded Systems.
IEEE Access, 2019

Analysis and Optimization of CNN-based Super Resolution with Filter Pruning.
Proceedings of the 2019 International Conference on Information and Communication Technology Convergence, 2019

Analysis and Optimization of CNN-based Semantic Segmentation of Satellite Images.
Proceedings of the 2019 International Conference on Information and Communication Technology Convergence, 2019

A SIMD-aware pruning technique for convolutional neural networks with multi-sparsity levels: work-in-progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019

2018
Context-aware dataflow adaptation technique for low-power multi-core embedded systems.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
An Energy-Aware Runtime Management of Multi-Core Sensory Swarms.
Sensors, 2017

Executable dataflow benchmark generation technique for multi-core embedded systems.
Proceedings of the International Symposium on Rapid System Prototyping, 2017

2016
A Formal Approach to Power Optimization in CPSs With Delay-Workload Dependence Awareness.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Power Optimization of Multimode Mobile Embedded Systems with Workload-Delay Dependency.
Mob. Inf. Syst., 2016

Color transformation-based perceptuality-aware dimming for TFT LCDs.
IEICE Electron. Express, 2016

Real-time co-scheduling of multiple dataflow graphs on multi-processor systems.
Proceedings of the 53rd Annual Design Automation Conference, 2016

An Online Self-Adaptive System Management Technique for Multi-Core Systems.
Proceedings of the 7th International Conference on Ambient Systems, 2016

2015
Modeling and power optimization of cyber-physical systems with energy-workload tradeoff.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2014
EURETILE D7.3 - Dynamic DAL benchmark coding, measurements on MPI version of DPSNN-STDP (distributed plastic spiking neural net) and improvements to other DAL codes.
CoRR, 2014

COOLIP: Simple yet effective job allocation for distributed thermally-throttled processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Reliability-aware mapping optimization of multi-core systems with mixed-criticality.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Static Mapping of Mixed-Critical Applications for Fault-Tolerant MPSoCs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

On the Scheduling of Fault-Tolerant Mixed-Criticality Systems.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

AdaPNet: Adapting process networks in response to resource variations.
Proceedings of the 2014 International Conference on Compilers, 2014

2013
Predictability for timing and temperature in multiprocessor system-on-chip platforms.
ACM Trans. Embed. Comput. Syst., 2013

Real-time worst-case temperature analysis with temperature-dependent parameters.
Real Time Syst., 2013

Efficient Worst-Case Temperature Evaluation for Thermal-Aware Assignment of Real-Time Applications on MPSoCs.
J. Electron. Test., 2013

Reliable and Efficient Execution of Multiple Streaming Applications on Intel's SCC Processor.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

Expandable process networks to efficiently specify and explore task, data, and pipeline parallelism.
Proceedings of the International Conference on Compilers, 2013

2012
Worst-case temperature analysis for different resource models.
IET Circuits Devices Syst., 2012

Worst-Case Temperature Guarantees for Real-Time Applications on Multi-core Systems.
Proceedings of the 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, 2012

Fast worst-case peak temperature evaluation for real-time applications on multi-core systems.
Proceedings of the 13th Latin American Test Workshop, 2012

Multi-objective mapping optimization via problem decomposition for many-core systems.
Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 2012

Scenario-based design flow for mapping streaming applications onto on-chip many-core systems.
Proceedings of the 15th International Conference on Compilers, 2012

Power agnostic technique for efficient temperature estimation of multicore embedded systems.
Proceedings of the 15th International Conference on Compilers, 2012

2011
Worst-Case Temperature Analysis for Different Resource Availabilities: A Case Study.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

Thermal-Aware Task Assignment for Real-Time Applications on Multi-Core Systems.
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011

PRO3D, Programming for Future 3D Manycore Architectures: Project's Interim Status.
Proceedings of the Formal Methods for Components and Objects, 10th International Symposium, 2011

Worst-case temperature analysis for real-time systems.
Proceedings of the Design, Automation and Test in Europe, 2011

Thermal-aware system analysis and software synthesis for embedded multi-processors.
Proceedings of the 48th Design Automation Conference, 2011

2010
An MILP-Based Performance Analysis Technique for Non-Preemptive Multitasking MPSoC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2009
A timed HW/SW coemulation technique for fast yet accurate system verification.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

Pipelined data parallel task mapping/scheduling technique for MPSoC.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis.
J. Signal Process. Syst., 2008

2007
Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems.
Proceedings of the 2007 International Conference on Compilers, 2007


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