Swatilekha Majumdar

Orcid: 0000-0002-9116-0215

According to our database1, Swatilekha Majumdar authored at least 7 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2021
Single Bit-Line Differential Sensing Based Real-Time NVSRAM for Low Power Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Efficient Video Summarization Framework using EEG and Eye-tracking Signals.
CoRR, 2021

LEnS: Lifetime Enhancement Coding Scheme for Non-volatile Memory Processors.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2019
Investigation of Unified Emerging-NVM SoC Architecture for IoT-WSN Applications.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

A Novel Gate-Level On-Chip Crosstalk Noise Reduction Circuit for Deep Sub-micron Technology.
Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

2017
Stability analysis of hybrid CMOS-RRAM based 4T-2R NVSRAM.
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017


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