Arindam Mallik

According to our database, Arindam Mallik authored at least 40 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge.

Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

IEEE J. Solid State Circuits, 2023

AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference.

Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik

IEEE Access, 2023

Evaluating the Effects of FeFET Device Variability on Charge Sharing Based AiMC Accelerator.

Swatilekha Majumdar, Stefan Cosemans, Arindam Mallik, Peter Debacker, Francky Catthoor, Jan Van Houdt

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration.

Nathan Laubeuf, Jonas Doevenspeck, Ioannis A. Papistas, Michele Caselli, Stefan Cosemans, Peter Vrancx, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Francky Catthoor, Rudy Lauwereins

ACM Trans. Design Autom. Electr. Syst., 2022

AERO: Design Space Exploration Framework for Resource-Constrained CNN Mapping on Tile-Based Accelerators.

Simei Yang, Debjyoti Bhattacharjee, Vinay B. Y. Kumar, Saikat Chatterjee, Sayandip De, Peter Debacker, Diederik Verkest, Arindam Mallik, Francky Catthoor

IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC.

Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst

Proceedings of the IEEE International Solid-State Circuits Conference, 2022

Write-Verify Scheme for IGZO DRAM in Analog in-Memory Computing.

Michele Caselli, Subhali Subhechha, Peter Debacker, Arindam Mallik, Diederik Verkest

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation.

Michele Caselli, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021

Analog In-memory Computing in FeFET-based 1T1R Array for Edge AI Applications.

D. Saito, T. Kobayashi, Hiroki Koga, Nicolo Ronchi, Kaustuv Banerjee, Yusuke Shuto, Jun Okuno, Kenta Konishi, Luca Di Piazza, Arindam Mallik, Jan Van Houdt, Masanori Tsukamoto, K. Ohkuri, Taku Umebayashi, Takayuki Ezaki

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing.

Michele Caselli, Ioannis A. Papistas, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest

Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

Design-Technology Space Exploration for Energy Efficient AiMC-Based Inference Acceleration.

Debjyoti Bhattacharjee, Nathan Laubeuf, Stefan Cosemans, Ioannis A. Papistas, Arindam Mallik, Peter Debacker, Myung Hee Na, Diederik Verkest

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Noise tolerant ternary weight deep neural networks for analog in-memory inference.

Jonas Doevenspeck, Peter Vrancx, Nathan Laubeuf, Arindam Mallik, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene

Proceedings of the International Joint Conference on Neural Networks, 2021

A 22 nm, 1540 TOP/s/W, 12.1 TOP/s/mm² in-Memory Analog Matrix-Vector-Multiplier for DNN Acceleration.

Ioannis A. Papistas, Stefan Cosemans, Bram Rooseleer, Jonas Doevenspeck, Myung Hee Na, Arindam Mallik, Peter Debacker, Diederik Verkest

Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2019

FQ-Conv: Fully Quantized Convolution for Efficient and Accurate Inference.

Bram-Ernst Verhoef, Nathan Laubeuf, Stefan Cosemans, Peter Debacker, Ioannis A. Papistas, Arindam Mallik, Diederik Verkest

CoRR, 2019

2018

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling.

A. Vandooren, Liesbeth Witters, Jacopo Franco, Arindam Mallik, Bertrand Parvais, Z. Wu, Amey Walke, V. Deshpande, E. Rosseel, Andriy Hikavyy, W. Li, L. Peng, Nouredine Rassoul, Geraldine Jamieson, Fumihiro Inoue, G. Verbinnen, Katia Devriendt, Lieve Teugels, N. Heylen, E. Vecchio, T. Zheng, Niamh Waldron, Vincent De Heyn, Dan Mocuta, Nadine Collaert

Proceedings of the 2018 International Conference on IC Design & Technology, 2018

2015

Lateral NWFET optimization for beyond 7nm nodes.

Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer

Proceedings of the 2015 International Conference on IC Design & Technology, 2015

2014

Design Technology co-optimization for N10.

Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, Mircea Dusa, Arindam Mallik, Sushil Sakhare, Boris Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, Philippe Leray, Tsung-Te Liu, Kenichi Miyaguchi, Bertrand Parvais, Pieter Schuddinck, Philippe Weemaes, Abdelkarim Mercha, Jürgen Bömmels, Naoto Horiguchi, Greg McIntyre, Aaron Thean, Zsolt Tökei, Shaunee Cheng, Diederik Verkest, An Steegen

Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013

TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes.

Arindam Mallik, Paul Zuber, Tsung-Te Liu, Bharani Chava, Bhavana Ballal, Pablo Royer Del Bario, Rogier Baert, Kris Croes, Julien Ryckaert, Mustafa Badaroglu, Abdelkarim Mercha, Diederik Verkest

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2011

Automatic Extraction of Pipeline Parallelism for Embedded Software Using Linear Programming.

Daniel Cordes, Andreas Heinig, Peter Marwedel, Arindam Mallik

Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011

2010

Mapping Embedded Applications on MPSoCs: The MNEMEE Approach.

Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll, Peter Marwedel, Daniel Cordes, Robert Pyka, Arindam Mallik, Stylianos Mamagkakis, François Capman, Séverin Collet, Nikolaos Mitas, Dimitrios Kritharidis

Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Mapping Embedded Applications on MPSoCs: The MNEMEE Approach.

Christos Baloukas, Lazaros Papadopoulos, Dimitrios Soudris, Sander Stuijk, Olivera Jovanovic, Florian Schmoll, Daniel Cordes, Robert Pyka, Arindam Mallik, Stylianos Mamagkakis, François Capman, Séverin Collet, Nikolaos Mitas, Dimitrios Kritharidis

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms.

Yiannis Iosifidis, Arindam Mallik, Stylianos Mamagkakis, Eddy de Greef, Alexandros Bartzas, Dimitrios Soudris, Francky Catthoor

Proceedings of the 47th Design Automation Conference, 2010

Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming.

Daniel Cordes, Peter Marwedel, Arindam Mallik

Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

MNEMEE: a framework for memory management and optimization of static and dynamic data in MPSoCs.

Arindam Mallik, Peter Marwedel, Dimitrios Soudris, Sander Stuijk

Proceedings of the 2010 International Conference on Compilers, 2010

2009

User- and process-driven dynamic voltage and frequency scaling.

Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

2008

Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction.

Alex Shye, Berkin Özisikyilmaz, Arindam Mallik, Gokhan Memik, Peter A. Dinda, Robert P. Dick, Alok N. Choudhary

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

PICSEL: measuring user-perceived performance to control dynamic frequency scaling.

Arindam Mallik, Jack Cosgrove, Robert P. Dick, Gokhan Memik, Peter A. Dinda

Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, 2008

2007

Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment.

Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Power reduction through measurement and modeling of users and CPUs: summary.

Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick

Proceedings of the 2007 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2007

Variable latency caches for nanoscale processor.

Serkan Ozdemir, Arindam Mallik, Ja Chun Ku, Gokhan Memik, Yehea I. Ismail

Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

The user in experimental computer systems research.

Peter A. Dinda, Gokhan Memik, Robert P. Dick, Bin Lin, Arindam Mallik, Ashish Gupta, Samuel Rossoff

Proceedings of the Workshop on Experimental Computer Science, 2007

Automated task distribution in multicore network processors using statistical analysis.

Arindam Mallik, Yu Zhang, Gokhan Memik

Proceedings of the 2007 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2007

2006

User-Driven Frequency Scaling.

Arindam Mallik, Bin Lin, Gokhan Memik, Peter A. Dinda, Robert P. Dick

IEEE Comput. Archit. Lett., 2006

Smart bit-width allocation for low power optimization in a systemc based ASIC design environment.

Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Low Power Correlating Caches for Network Processors.

Arindam Mallik, Gokhan Memik

J. Low Power Electron., 2005

Application-Level Error Measurements for Network Processors.

Arindam Mallik, Matthew C. Wildrick, Gokhan Memik

IEICE Trans. Inf. Syst., 2005

Load elimination for low-power embedded processors.

Gokhan Memik, Mahmut T. Kandemir, Arindam Mallik

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files.

Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, Yehea I. Ismail

Proceedings of the 2005 International Conference on Dependable Systems and Networks (DSN 2005), 28 June, 2005

2004

A Case for Clumsy Packet Processors.

Arindam Mallik, Gokhan Memik

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Design and implementation of correlating caches.

Arindam Mallik, Matthew C. Wildrick, Gokhan Memik

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004